HUF75345G3, HUF75345P3, HUF75345S3S
Data Sheet December 2001
75A, 55V, 0.007 Ohm, N-Channel UltraFET
Power MOSFETs
These N-Channel pow er MOSFETs
are manufactured using the
innovat ive Ul traFET® pr ocess . This
advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outsta nding performance . This devi ce i s c apa ble
of withstanding hi gh energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, lowvoltage bus switc hes, and power managem ent in portable
and battery-operated products.
Formerly developmental type TA75345.
Ordering Information
PART NUMBER PACKAGE BRAND
HUF75345G3 TO-247 75345G
HUF75345P3 TO-220AB 75345P
HUF75345S3S TO-263AB 75345S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF75345S3ST.
Features
• 75A, 55V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Models
- Thermal Impedance SPICE and SABER Models
Available on the WEB at: www.fairchildsemi.com
• Peak Current vs Pu lse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
JEDEC STYLE TO-247 JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN
(TAB)
JEDEC TO-263AB
GATE
SOURCE
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
(FLANGE)
DRAIN
(FLANGE)
DRAIN
SOURCE
DRAIN
GATE
©2001 Fairchild Semiconductor Corpo ration HUF75345G3, HUF75345P3, HUF75345S3S Rev. B
HUF75345G3, HUF75345P3, HUF75345S3S
Absolute Maximum Ratings
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (R
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “A bsolute Maximu m Rating s” may cause per manent d amage to t he device. This is a str ess on ly rating and operation o f the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
= 25oC to 150oC.
1. T
J
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
TC = 25oC, Unless Otherwise Specified
UNITS
DSS
DGR
GS
D
DM
AS
D
, T
J
STG
L
pkg
55 V
55 V
±20 V
75
Figure 4
Figure 6
325
2.17
-55 to 175
300
260
A
W
W/oC
o
C
o
C
o
C
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
Drain to Source On Resistance r
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t
GATE CHARGE SPECIFICATIONS
Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q
Gate to Source Gate Charge Q
Gate to Drain “Miller” Charge Q
DSSID
DSS
VDS = 50V, VGS = 0V - - 1 µA
V
GSS
GS(TH)VGS
DS(ON)ID
θJC
θJA
VGS = ±20V - - ±100 nA
(Figure 3) - - 0.46
TO-247 - - 30
TO-220, TO-263 - - 62
ON
d(ON)
d(OFF)
OFF
g(TOT)VGS
g(10)
g(TH)
VDD = 30V, ID ≅ 75A,
R
R
r
f
VGS = 0V to 10V - 125 165 nC
VGS = 0V to 2V - 6.8 10 nC
gs
gd
= 250µA, VGS = 0V (Figure 11) 55 - - V
= 45V, VGS = 0V, TC = 150oC--250µA
DS
= VDS, ID = 250µA (Figure 10) 2 - 4 V
= 75A, VGS = 10V (Figure 9) - 0.006 0.007 W
o
o
o
--145ns
= 0.4Ω, VGS = 10V,
L
GS
= 2.5Ω
-20- ns
-75- ns
-45- ns
-30- ns
--115ns
= 0V to 20V VDD = 30V,
≅ 75A,
I
D
= 0.4Ω
R
L
I
= 1.0mA
g(REF)
(Figure 13)
- 220 275 nC
-14-nC
-58-nC
C/W
C/W
C/W
©2001 Fairchild Semiconductor Corpo ration HUF75345G3, HUF75345P3, HUF75345S3S Rev. B
HUF75345G3, HUF75345P3, HUF75345S3S
Electrical Specifications
TC = 25oC, Unless Otherwise Specified (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
CAPACITANCE SPECIFICATIONS
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovered Charge Q
Typical Performance Curves
1.2
1.0
0.8
ISS
OSS
RSS
SD
rr
RR
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 12)
- 4000 - pF
- 1450 - pF
- 450 - pF
ISD = 75A - - 1.25 V
ISD = 75A, dISD/dt = 100A/µs - - 110 ns
ISD = 75A, dISD/dt = 100A/µs - - 225 nC
80
60
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
TC, CASE TEMPERATURE (oC)
125 17
FIGURE 1. NORMALIZED POWER DISSIPA TION vs CASE
TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
, NORMALIZED
θJC
Z
THERMAL IMPEDANCE
0.01
-5
10
SINGLE PULSE
-4
10
-3
10
t, RECTANGULAR PULSE DURATION (s)
40
, DRAIN CURRENT (A)
20
D
I
0
25
50 75 100 125 150 17
TC, CASE TEMPERA TURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
P
DM
t
NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-2
10
-1
10
1/t2
x R
θJC
0
10
1
θJC
t
2
+ T
C
1
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2001 Fairchild Semiconductor Corpo ration HUF75345G3, HUF75345P3, HUF75345S3S Rev. B