Fairchild Semiconductor HUF75332P3, HUF75332S3S Datasheet

HUF75332G3, HUF75332P3, HUF75332S3S

Data Sheet December 2001

60A, 55V, 0.019 Ohm, N-Channel UltraFET Power MOSFETs

These N-Channel pow er MOSFETs are manufactured using the innovat ive Ul traFET® pr ocess . This

advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outsta nding performance . This devi ce i s c apa ble of withstanding hi gh energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, lowvoltage bus switc hes, and power managem ent in portable and battery-operated products.

Formerly developmental type TA75332.

Ordering Information

PART NUMBER PACKAGE BRAND

HUF75332G3 TO-247 75332G HUF75332P3 TO-220AB 75332P HUF75332S3S TO-263AB 75332S

NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-263AB variant in tape and reel, e.g., HUF75332S3ST.

Features

• 60A, 55V

• Simulation Models

- T emperature Compensated PSPICE®

and SABER™

Models

- SPICE and SABER Thermal Impedance Models Available on the WEB at: www.fairchildsemi.com

• Peak Current vs Pu lse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”

Symbol

Packaging

JEDEC STYLE TO-247 JEDEC TO-220AB

SOURCE

DRAIN

GATE

DRAIN (TAB)

JEDEC TO-263AB

GATE

SOURCE

Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html

For severe environments, see our Automotive HUFA series.

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.

DRAIN

(FLANGE)

DRAIN

(FLANGE)

SOURCE

DRAIN

GATE

HUF75332G3, HUF75332P3, HUF75332S3S

Absolute Maximum Ratings

TC = 25oC, Unless Otherwise Specified

UNITS

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (R

= 20kΩ) (Note 1) . . . . . . . . . . . . . V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

55 V 55 V

±20 V

Drain Current

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . .T

, T

STG

Figure 4

Figure 6

145

0.97

-55 to 175

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “A bsolute Maximu m Rating s” may cause per manent d amage to t he device. This is a str ess on ly rating and operation o f the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

pkg

300 260

W/oC

NOTE:

= 25oC to 150oC.

1. T

Electrical Specifications

TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage BV Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I

DSSID

DSS

GSS

= 250µA, VGS = 0V (Figure 11) 55 - - V VDS = 50V, VGS = 0V - - 1 µA V

= 45V, VGS = 0V, TC = 150oC--250µA

VGS = ±20V - - ±100 nA

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V Drain to Source On Resistance r

GS(TH)VGS

DS(ON)ID

= VDS, ID = 250µA (Figure 10) 2 - 4 V

= 60A, VGS = 10V (Figure 9) - 0.016 0.019 Ω

THERMAL SPECIFICATIONS

Thermal Resistance Junction to Case R Thermal Resistance Junction to Ambient R

SWITCHING SPECIFICATIONS (V

= 10V) Turn-On Time t Turn-On Delay Time t

d(ON)

Rise Time t Turn-Off Delay Time t

d(OFF)

Fall Time t Turn-Off Time t

θJC θJA

OFF

(Figure 3) - - 1.03 TO-247 - - 30 TO-220, TO-263 - - 62

VDD = 30V, ID ≅ 60A,

= 0.50Ω, VGS = 10V,

= 6.8Ω

--100ns

-12- ns

-55- ns

-11- ns

-25- ns

- - 55 ns

C/W

GATE CHARGE SPECIFICATIONS

Total Gate Charge Q Gate Charge at 10V Q Threshold Gate Charge Q Gate to Source Gate Charge Q Reverse Transfer Capacitance Q

g(TOT)VGS

g(10)

g(TH)

gs gd

= 0V to 20V VDD = 30V,

≅ 60A,

VGS = 0V to 10V - 40 50 nC VGS = 0V to 2V - 2.5 3.0 nC

= 0.50Ω

g(REF)

= 1.0mA

(Figure 13)

-7085nC

-6-nC

-15-nC

HUF75332G3, HUF75332P3, HUF75332S3S

Electrical Specifications

TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

CAPACITANCE SPECIFICATIONS

Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V Reverse Recovery Time t Reverse Recovered Charge Q

Typical Performance Curves

1.2

1.0

0.8

ISS OSS RSS

VDS = 25V, VGS = 0V, f = 1MHz (Figure 12)

- 1300 - pF

- 480 - pF

- 115 - pF

ISD = 60A - - 1.25 V ISD = 60A, dISD/dt = 100A/µs--75ns ISD = 60A, dISD/dt = 100A/µs - - 140 nC

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0 25 50 75 100 150

TC, CASE TEMPERATURE (oC)

125 17

FIGURE 1. NORMALIZED POWER DISSIP ATION vs CASE

TEMPERATURE

DUTY CYCLE - DESCENDING ORDER

0.5

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

θJC

THERMAL IMPEDANCE

0.01

-5

SINGLE PULSE

-4

-3

t, RECTANGULAR PULSE DURATION (s)

, DRAIN CURRENT (A)

50 75 100 125 150 17

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

-1

1/t2

x R

θJC

+ T

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

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