Fairchild Semiconductor FQU2N50B Datasheet

FQD2N50B / FQU2N50B

500V N-Channel MOSFET

May 2000

QFET

QFET

QFETQFET

TM

General Description

These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,

FQD2N50B / FQU2N50B

planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply, power
factor correction, electronic lamp ballast based on half
bridge.

D

S

D-PAK

= 25°C)

C

G

D

S

= 25°C unless otherwise noted

C

= 25°C)

C

= 100°C)

C

FQD Series

- Continuous (T

- Continuous (T

- Derate above 25°C 0.24 W/°C

G

Absolute Maximum Ratings T

Symbol Parameter FQD2N50 / FQU2N50 Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt
P

D

, T

T

J

STG

T

L

Drain-Source Voltage 500 V
Drain Current

Drain Current - Pulsed
Gate-Source Voltage ± 30 V
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy

Power Dissipation (TA = 25°C) *
Power Dissipation (T

Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds

Features

• 1.6A, 500V, R

• Low gate charge ( typical 6.0 nC)

• Low Crss ( typical 4.0 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

I-PAK

FQU Series

(Note 1)

(Note 2)
(Note 1)
(Note 1)
(Note 3)

= 5.3Ω @VGS = 10 V

DS(on)

G

1.6 A

1.0 A

6.4 A

120 mJ

1.6 A

3.0 mJ

4.5 V/ns

2.5 W
30 W

300 °C

!

!

!

!

D

!

!

"

"

"

"

"

"
"

"

!

!

S

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θJC

R

θJA

R

θJA

* When mounted on the minimum pad size recommended (PCB Mount)

©2000 Fairchild Semiconductor International

Thermal Resistance, Junction-to-Case -- 4.17 °C/W
Thermal Resistance, Junction-to-Ambient * -- 50 °C/W
Thermal Resistance, Junction-to-Ambient -- 110 °C/W

Rev. A, May 2000

FQD2N50B / FQU2N50B

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter T e s t Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T
I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage
Breakdown Voltage Temperature

Coefficient

J

Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = 250 µA

V

GS

I

= 250 µA, Referenced to 25°C

D

V

= 500 V, VGS = 0 V

DS

V

= 400 V, TC = 125°C

DS

V

= 30 V, VDS = 0 V

GS

= -30 V, VDS = 0 V

V

GS

500 -- -- V

-- 0.48 -- V/°C

-- -- 1 µA

-- -- 10 µA

-- -- 100 nA

-- -- -100 nA

On Characteristics

V

R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage

Static Drain-Source
On-Resistance

Forward Transconductance

V

DS

V

= VGS, ID = 250 mA

DS

= 10 V, ID = 0.8 A

V

GS

= 50 V, ID = 0.8 A

V

DS

(Note 4)

2.3 3.0 3.7 V

3.6 4.3 5.0 V

-- 4.2 5.3 Ω

-- 1.3 -- S

= VGS, ID = 250 µA

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance -- 30 40 pF
Reverse Transfer Capacitance -- 4 6 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 180 230 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q

g
gs
gd

Turn-On Delay Time
Turn-On Rise Time -- 25 60 ns
Turn-Off Delay Time -- 10 30 ns
Turn-Off Fall Time -- 20 50 ns
Total Gate Charge
Gate-Source Charge -- 1.3 -- nC
Gate-Drain Charge -- 3.0 -- nC

= 250 V, ID = 2.1 A,

V

DD

= 25 Ω

R

G

V

= 400 V, ID = 2.1 A,

DS

V

GS

= 10 V

(Note 4, 5)

(Note 4, 5)

-- 6 20 ns

-- 6.0 8.0 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 85mH, IAS = 1.6A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 2.1A, di/dt ≤ 200A/µs, VDD≤ BV

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

©2000 Fairchild Semiconductor International

Maximum Continuous Drain-Source Diode Forward Current -- -- 1.6 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 6.4 A

V

Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge -- 0.69 -- µC

Starting TJ = 25°C

DSS,

= 0 V, IS = 1.6 A

GS

= 0 V, IS = 2.1 A,

V

GS

dI

/ dt = 100 A/µs

F

-- -- 1.4 V

-- 195 -- ns

(Note 4)

Rev. A, May 2000

Typical Characteristics

V

GS

Top : 15 V
10 V

8.0 V

7.0 V

0

6.5 V

10

6.0 V
Bottom : 5.5 V

-1

10

, Drain Current [A]

D

I

FQD2N50B / FQU2N50B

-2

10

-1

10

18

15

12

],

Ω

[

9

DS(on)

R

6

Drain-Source On-Resistance

3

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

0

10

VDS , Drain-Source Voltage [V]

VGS = 20V

ID , Drain Curren t [A]

※

1. 250μs Pulse Test

2. T

VGS = 10V

※

Note s :

10

Note : T

℃

0

10

, Dra in Cu rrent [A]

D

I

℃

= 25

C

1

-1

10

246810

150

℃

25

℃

-55

※

Notes :

1. V

= 50V

DS

2. 250μs Pulse Test

VGS , Gate - Source Voltage [V]

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

0

℃

= 25

J

10

℃

℃

25

, Reverse Drain Current [A]

DR

I

-1

10

0.2 0.4 0.6 0.8 1.0 1.2 1.4

150

※

Notes :

1. V

2. 250μs Pulse Test

VSD , Source-Dr a in Voltage [V]

= 0V

GS

Figure 3. On-Resistance Variati on vs.

Drain Current and Gate Voltage

350

300

250

200

150

100

Capacitance [pF]

50

0

-1

10

Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics

©2000 Fairchild Semiconductor International

C
C
C

C

iss

C

oss

C

rss

0

10

VDS, Drain-Source Voltage [V]

= Cgs + Cgd (Cds = shorted)

iss

= Cds + C

oss

gd

= C

rss

gd

※

Notes :

= 0 V

1. V

GS

2. f = 1 MH z

1

10

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

VDS = 100V

VDS = 250V

VDS = 400V

※

Note : I

= 2.1 A

D

Rev. A, May 2000

12

10

8

6

4

, Gate-Source Voltage [V]

2

GS

V

0

01234567

QG, Tota l Gate Charge [n C]