Fairchild Semiconductor FQU2P25, FQD2P25 Datasheet

FQD2P25 / FQU2P25
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April 2000
QFET
QFET
QFETQFET
TM
General Description
FQD2P25 / FQU2P25
These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well
Features
• -2.0A, -250V, R
• Low gate charge ( typical 6.5 nC)
• Low Crss ( typical 6.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
= 4.0Ω @VGS = -10 V
DS(on)
suited for high efficiency switching DC/DC converters.
D
G
I-PAK
S
D-PAK
FQD Series
G
Absolute Maximum Ratings
G
D
S
TC = 25°C unless otherwise noted
FQU Series
Symbol Parameter FQD2P25 / FQU2P25 Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt P
D
Drain-Source Voltage -250 V Drain Current
- Continuous (T
- Continuous (T Drain Current - Pulsed Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Power Dissipation (TA = 25°C) * Power Dissipation (T
= 25°C)
C
= 25°C)
C
= 100°C)
C
(Note 1)
(Note 2) (Note 1) (Note 1) (Note 3)
-2.0 A
-1.27 A
-8.0 A
±
30 V
120 mJ
-2.0 A
3.7 mJ
-5.5 V/ns
2.5 W 37 W
- Derate above 25°C 0.29 W/°C
, T
T
J
STG
T
L
Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, 1/8from case for 5 seconds
300 °C
S
D
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θ
JC
R
θ
JA
R
θ
JA
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Thermal Resistance, Junction-to-Case -- 3.4 °CW Thermal Resistance, Junction-to-Ambient * -- 50 °CW Thermal Resistance, Junction-to-Ambient -- 110 °CW
Rev. A, April 2000
FQD2P25 / FQU2P25
Electrical Characteristics

TC = 25°C unless otherwise noted
Symbol Parameter Te st Conditions Min Typ Max Units
Off Characteristics
BV
BV / ∆T I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
DSS
Breakdown Voltage Temperature
DSS
Coefficient
J
Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
= 0 V, ID = -250 µA
V
GS
= -250 µA, Referenced to 25°C
I
D
V
= -250 V, VGS = 0 V
DS
V
= -200 V, TC = 125°C
DS
= -30 V, VDS = 0 V
V
GS
V
= 30 V, VDS = 0 V
GS
-250 -- -- V
-- -0.2 -- V/°C
-- -- -1
-- -- -10
-- -- -100 nA
-- -- 100 nA
On Characteristics
V R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage Static Drain-Source
On-Resistance Forward Transconductance
= VGS, ID = -250 µA
V
DS
= -10 V, ID = -1.0 A
V
GS
= -40 V, ID = -1.0 A
V
DS
(Note 4)
-3.0 -- -5.0 V
-- 3.15 4.0
-- 1.1 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance -- 40 55 pF Reverse Transfer Capacitance -- 6.5 8.5 pF
= -25 V, VGS = 0 V,
V
DS
f = 1.0 MHz
-- 190 250 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q
g gs gd
Turn-On Delay Time Turn-On Rise Time -- 40 90 ns Turn-Off Delay Time -- 12 35 ns Turn-Off Fall Time -- 25 60 n s Total Gate Charge Gate-Source Charge -- 1.8 -- nC Gate-Drain Charge -- 3.0 -- nC
= -125 V, ID = -2.3 A,
V
DD
= 25
R
G
V
= -200 V, ID = -2.3 A,
DS
V
GS
= -10 V
(Note 4, 5)
(Note 4, 5)
-- 8.5 25 ns
-- 6.5 8.5 nC
µ
A
µ
A
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 48mH, I
3. ISD  -2.3A, di/dt  300A/µs, VDD  BV
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Maximum Continuous Drain-Source Diode Forward Current -- -- -2.0 A Maximum Pulsed Drain-Source Diode Forward Current -- -- -8.0 A
= 0 V, IS = -2.0 A
Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 0.4 --
= -2.0A, VDD = -50V, RG = 25
AS
Ω,
Starting TJ = 25°C
Starting TJ = 25°C
DSS,
V
GS
= 0 V, IS = -2.3 A,
V
GS
/ dt = 100 A/µs
dI
F
(Note 4)
-- -- -5.0 V
-- 110 -- ns
µ
Rev. A, April 2000
C
Typical Characteristics
V
GS
Top : - 1 5 .0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-6.0 V Bottom : -5.5 V
0
10
0
FQD2P25 / FQU2P25
, Dra in Curre n t [A ]
D
-1
10
-I
-1
10
0
10
Note s :
1. 250s Pulse Test
2. T
= 25
C
1
10
-VDS, Drain-Source Voltage [V]
10
, Drain Current [A]
D
-I
-1
10
246810
25
-VGS , Gate-Source Voltage [V]
150
-55
Notes :
= -40V
1. V
DS
2. 250s Pulse Test
Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s
15
12
VGS = - 10V
],
9
[
DS(on)
R
6
Drain-Source On-Resistance
3
0
0.0 1.5 3.0 4.5 6.0
VGS = - 20V
Note : T
-ID , Drai n Curren t [A]
0
= 25
J
10
150
, Reverse Drain Current [A]
DR
-I
-1
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
-VSD , Source-Drain Voltage [V]
25
Note s :
= 0V
1. V
GS
2. 250s Pulse Test
Figure 3. On-Resistance Variati on vs.
Drain Current and Gate Voltage
400
300
200
Capacitances [pF]
100
0
-1
10
Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
C C C
C
iss
C
oss
C
rss
0
10
-VDS, Drain-Source Voltage [V]
= Cgs + Cgd (Cds = shorted)
iss
= Cds + C
oss
gd
= C
rss
gd
Note s :
1. V
2. f = 1 MHz
1
10
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
VDS = -50V
VDS = -125V
VDS = -200V
= -2.3 A
Note : I
D
Rev. A, April 2000
12
10
8
= 0 V
GS
6
4
, Gate-Source Voltage [V]
GS
2
-V
0
01234567
QG, Total Gate C h arg e [nC]
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