Fairchild Semiconductor FQD2N100 Datasheet

FQD2N100/FQU2N100
1000V N-Channel MOSFET
FQD2N100/FQU2N100
February 2002
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well
Features
• 1.6A, 1000V, R
• Low gate charge ( typical 12 nC)
• Low Crss ( typical 5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
= 9 @VGS = 10 V
DS(on)
suited for electronic lamp starter and ballast.
D
GS
D-PAK
FQD Series
GSD
Absolute Maximum Ratings T
I-PAK
FQU Series
= 25°C unless otherwise noted
C
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G
D
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S
Symbol Parameter FQD2N100/FQU2N100 Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt P
D
Drain-Source Voltage 1000 V Drain Current
- Continuous (T
- Continuous (T
Drain Current - Pulsed
= 25°C)
C
= 100°C)
C
(Note 1)
1.6 A
1.0 A
6.4 A Gate-Source Voltage ± 30 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Power Dissipation (TA = 25°C) * Power Dissipation (T
= 25°C)
C
(Note 2) (Note 1) (Note 1) (Note 3)
160 mJ
1.6 A
5.0 mJ
5.5 V/ns
2.5 W
50 W
- Derate above 25°C 0.4 W/°C
, T
T
J
STG
T
L
Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
300 °C
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJC
R
θJA
R
θJA
* When mounted on the minimum pad size recommended (PCB Mount)
©2002 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Case -- 2.5 °C/W Thermal Resistance, Junction-to-Ambient * -- 50 °C/W Thermal Resistance, Junction-to-Ambient -- 110 °C/W
Rev. A, February 2002
FQD2N100/FQU2N100
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Te st Conditions Min Typ Max Units
Off Characteristics
BV
DSS
BV
DSS
/ ∆T I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient
J
Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
V
= 1000 V, VGS = 0 V
DS
V
= 800 V, TC = 125°C
DS
V
= 30 V, VDS = 0 V
GS
= -30 V, VDS = 0 V
V
GS
1000 -- -- V
-- 0.976 -- V/°C
-- -- 10 µA
-- -- 100 µA
-- -- 100 nA
-- -- -100 nA
On Characteristics
V R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage Static Drain-Source
On-Resistance Forward Transconductance
V
= VGS, ID = 250 µA
DS
= 10 V, ID = 0.8 A
V
GS
= 50 V, ID = 0.8 A
V
DS
(Note 4)
3.0 -- 5.0 V
-- 7.1 9
-- 1.9 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance -- 40 52 pF Reverse Transfer Capacitance -- 5 6.5 pF
= 25 V, VGS = 0 V,
V
DS
f = 1.0 MHz
-- 400 520 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q
Turn-On Delay Time Turn-On Rise Time -- 30 70 ns Turn-Off Delay Time -- 25 60 ns Turn-Off Fall Time -- 35 80 ns
g gs gd
Total Gate Charge Gate-Source Charge -- 2.5 -- nC Gate-Drain Charge -- 6.5 -- nC
= 500 V, ID = 2.0 A,
V
DD
R
= 25
G
= 800 V, ID = 2.0 A,
V
DS
V
GS
= 10 V
-- 13 35 ns
(Note 4, 5)
-- 12 15.5 nC
(Note 4, 5)
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 120mH, IAS = 1.6A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 2.0A, di/dt 300A/µs, VDD BV
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2002 Fairchild Semiconductor Corporation
Maximum Continuous Drain-Source Diode Forward Current -- -- 1.5 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 6.0 A
= 0 V, IS = 1.6 A
Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 2.3 -- µC
Starting TJ = 25°C
DSS,
V
GS
= 0 V, IS = 2.0 A,
V
GS
/ dt = 100 A/µs
dI
F
-- -- 1.4 V
-- 520 -- ns
(Note 4)
Rev. A, February 2002
Typical Characteristics
FQD2N100/FQU2N100
V
GS
Top : 1 5 .0 V
10.0 V
8.0 V
7.0 V
6.5 V
0
6.0 V
10
Bottom : 5.5 V
-1
10
, Dra in C u rre n t [A ]
D
I
Notes :
µ
1. 250
s Pulse Test
2. T
= 25
-2
10
-1
10
0
10
C
1
10
VDS, Drain-Source Voltage [V]
VGS = 10V
VGS = 20V
Note : T
= 25
J
20
15
]
, [
10
DS(on)
R
5
Drain-Source On-Resistance
0
01234
ID , Drai n Curren t [A]
0
10
, Dra in C u rre nt [A ]
D
I
-1
10
246810
150
25
-55
Note s :
= 50V
1. V
DS
µs Pulse T est
2. 250
VGS , Ga te- S ou rc e V o ltag e [V ]
Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s
0
10
, Reverse Drain Current [A]
DR
I
-1
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4
150
25
Note s :
1. V
2. 250
= 0V
GS
µs Pulse T est
VSD , Sou rc e -D ra in V o ltag e [V ]
Figure 3. On-Resistance Variati on vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
VDS = 200V VDS = 500V
VDS = 1000V
Note : I
700
600
500
400
300
Capacitance [pF]
200
100
0
-1
10
VDS, Drain-Source Voltage [V]
C
= Cgs + Cgd (Cds = shorted)
iss
C
= Cds + C
oss
gd
C
= C
rss
10
gd
1
Note s :
1. V
= 0 V
GS
2. f = 1 MHz
C
iss
C
oss
C
rss
0
10
12
10
8
6
4
, Ga te - Sourc e Vo lta ge [V]
2
GS
V
0
0 2 4 6 8 101214
QG, Tota l Gate C harge [n C]
Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics
= 1.6 A
D
Rev. A, February 2002©2002 Fairchild Semiconductor Corporation
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