Fairchild Semiconductor FQI4N60, FQB4N60 Datasheet

FQB4N60 / FQI4N60

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600V N-Channel MOSFET

April 2000

QFET

QFET

QFETQFET

TM

General Description

FQB4N60 / FQI4N60

These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.

D

G

S

D2-PAK

FQB Series

Absolute Maximum Ratings

Symbol Parameter FQB4N60 / FQI4N60 Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt
P

D

, T

T

J

STG

T

L

Drain-Source Voltage 600 V
Drain Current

Drain Current - Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy

Power Dissipation (TA = 25°C) *
Power Dissipation (T

Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds

G

D

S



TC = 25°C unless otherwise noted

- Continuous (T

- Continuous (T

= 25°C)

C

- Derate above 25°C 0.6 W/°C

= 25°C)

C

= 100°C)

C

Features

• 4.4A, 600V, R

• Low gate charge ( typical 15 nC)

• Low Crss ( typical 8.0 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

I2-PAK

FQI Series

(Note 1)

(Note 2)
(Note 1)
(Note 1)
(Note 3)

= 2.2Ω @VGS = 10 V

DS(on)

G

4.4 A

2.8 A

17.6 A

±

30 V

260 mJ

4.4 A

10.6 mJ

4.5 V/ns

3.13 W
106 W

300 °C

D

S

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θ

JC

R

θ

JA

R

θ

JA

* When mounted on the minimum pad size recommended (PCB Mount)

©2000 Fairchild Semiconductor International

Thermal Resistance, Junction-to-Case -- 1.18 °CW
Thermal Resistance, Junction-to-Ambient * -- 40 °CW
Thermal Resistance, Junction-to-Ambient -- 62.5 °CW

Rev. A, April 2000

FQB4N60 / FQI4N60

Electrical Characteristics



TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

∆

BV
/ ∆T
I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage

DSS

Breakdown Voltage Temperature

DSS

Coefficient

J

Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = 250 µA

V

GS

= 250 µA, Referenced to 25°C

I

D

V

= 600 V, VGS = 0 V

DS

V

= 480 V, TC = 125°C

DS

= 30 V, VDS = 0 V

V

GS

V

= -30 V, VDS = 0 V

GS

600 -- -- V

-- 0.6 -- V/°C

-- -- 10

-- -- 100

-- -- 100 nA

-- -- -100 nA

On Characteristics

V
R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage
Static Drain-Source

On-Resistance
Forward Transconductance

= VGS, ID = 250 µA

V

DS

= 10 V, ID = 2.2 A

V

GS

= 50 V, ID = 2.2 A

V

DS

(Note 4)

3.0 -- 5.0 V

-- 1.77 2.2

-- 4.0 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance -- 70 90 pF
Reverse Transfer Capacitance -- 8 11 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 520 670 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q

g
gs
gd

Turn-On Delay Time
Turn-On Rise Time -- 45 100 ns
Turn-Off Delay Time -- 25 60 ns
Turn-Off Fall Time -- 35 80 ns
Total Gate Charge
Gate-Source Charge -- 3.4 -- nC
Gate-Drain Charge -- 7.1 -- nC

= 300 V, ID = 4.4 A,

V

DD

Ω

= 25

R

G

V

= 480 V, ID = 4.4 A,

DS

V

GS

= 10 V

(Note 4, 5)

(Note 4, 5)

-- 13 35 ns

-- 15 20 nC

µ

A

µ

A

Ω

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 25mH, I

3. ISD  4.4A, di/dt  200A/µs, V

4. Pulse Test : Pulse width 300µs, Duty cycle 2%

5. Essentially independent of operating temperature

©2000 Fairchild Semiconductor International

Maximum Continuous Drain-Source Diode Forward Current -- -- 4.4 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 17.6 A

= 0 V, IS = 4.4 A

Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge -- 1.5 --

= 4.4A, VDD = 50V, RG = 25

AS

DD



BV

DSS,

Ω,

Starting TJ = 25°C

Starting TJ = 25°C

V

GS

= 0 V, IS = 4.4 A,

V

GS

/ dt = 100 A/µs

dI

F

(Note 4)

-- -- 1.4 V

-- 250 -- ns

µ

Rev. A, April 2000

C

Typical Characteristics

V

GS

1

Top : 1 5 V

10

10 V

8.0 V

7.0 V

6.5 V

6.0 V
Botto m : 5.5 V

0

10

FQB4N60 / FQI4N60

, Dra in C u rre n t [A ]

D

I



-1

10

-1

10

0

10

VDS , Dra in-S o u rc e V olta g e [V ]

Note s :

1. 25 0s Pulse Tes t



2. T

= 25

C

1

10

1

10

150

0

10

, Dra in C u rre n t [A]

D

I

-1

10

246810



25

VGS , Gate-Source Voltage [V]





-55



Note s :

= 50V

1. V

DS

2. 250s Pulse Test

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

6

5

4

],



[

3

DS(ON)

R

2

Drain-Source On-Resistance

1

0

024681012

VGS = 20V

VGS = 10V



Note : T

= 25

J

ID, Drain Current [A]

1

10



0

10

, Reverse Drain Current [A]

DR

I

-1

10

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8



150

25

VSD , Source-Drain Voltage [V]





Note s :

= 0V

1. V

GS

2. 250s Pulse Test

Figure 3. On-Resistance Variati on vs.

Drain Current and Gate Voltage

1000

800

600

400

Capacitance [pF]

200

0

-1

10

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Ch a ra ct eristics

©2000 Fairchild Semiconductor International

C
C
C

C

iss

C

oss

C

rss

0

10

VDS, Drain-Source Voltage [V]

= Cgs + Cgd (Cds = shorted)

iss

= Cds + C

oss

gd

= C

rss

gd



Note s :

1. V

GS

2. f = 1 MHz

1

10

= 0 V

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

12

10

8

6

4

, Gate-Source Voltage [V]

GS

2

V

0

03691215

QG, Total Gate Ch a rg e [nC]

VDS = 120V

VDS = 300V

VDS = 480V



Note : I

= 4.4 A

D

Rev. A, April 2000