Fairchild Semiconductor FDS6064N7 Datasheet
May 2003
FDS6064N7
20V N-Channel PowerTrench MOSFET
FDS6064N7
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
Features
• 23 A, 20 V. R
R
R
= 3.5 mΩ @ VGS = 4.5 V
DS(ON)
= 4 mΩ @ VGS = 2.5 V
DS(ON)
= 6 mΩ @ VGS = 1.8 V
DS(ON)
“low side” synchronous rectifier operation, providing an
extremely low R
Applications
• Synchronous rectifier
• DC/DC converter
in a small package.
DS(ON)
• High performance trench technology for extremely
DS(ON)
low R
• High power and current handling capability
• Fast switching, low gate charge
• FLMP SO-8 package: Enhanced thermal
performance in industry-standard package size
Bottom-side
Drain Contact
5
6
7
8
4
3
2
1
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
Symbol Parameter Ratings Units
V
Drain-Source Voltage 20 V
DSS
V
Gate-Source Voltage
GSS
± 8
ID Drain Current – Continuous (Note 1a) 23 A
– Pulsed 60
PD
TJ, T
STG
Power Dissipation
Operating and Storage Junction Temperature Range –55 to +150
(Note 1a) 3.0
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 40
Thermal Resistance, Junction-to-Case 0.5
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS6064N7 FDS6064N7 13’’ 12mm 2500 units
2002 Fairchild Semiconductor Corpora tion
FDS6064N7 Rev D2 (W)
°C/W
FDS6064N7
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
∆BVDSS
∆T
I
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1
DSS
I
GSSF
I
GSSR
Breakdown Voltage Temperature
Coefficient
J
Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –8 V , VDS = 0 V –100 nA
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
= VGS, ID = 250 µA
V
DS
I
= 250 µA, Referenced to 25°C
D
VGS = 4.5 V, ID = 23 A
= 2.5 V, ID = 22 A
V
GS
= 1.8 V, ID = 18 A
V
GS
= 4.5 V, ID = 23 A,TJ = 125°C
V
GS
gFS Forward Transconductance VDS = 5 V, ID = 23 A 179 S
Dynamic Characteristics
C
Input Capacitance 7191 pF
iss
C
Output Capacitance 1403 pF
oss
C
Reverse Transfer Capacitance
rss
V
= 10 V, V
DS
f = 1.0 MHz
= 0 V,
GS
RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 1.2
Switching Characteristics (Note 2)
= 10 V, ID = 1 A,
V
t
Turn–On Delay Time 22 35 ns
d(on)
tr Turn–On Rise Time 22 35 ns
t
Turn–Off Delay Time 153 245 ns
d(off)
DD
= 4.5 V, R
V
GS
GEN
= 6 Ω
tf Turn–Off Fall Time
= 10 V, ID = 23 A,
V
Qg Total Gate Charge 70 98 nC
Qgs Gate–Source Charge 10 nC
DS
V
GS
= 4.5 V
Qgd Gate–Drain Charge
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current 2.5 A
VSD
Drain–Source Diode Forward
Voltage
trr Diode Reverse Recovery Time 43 nS
Qrr Diode Reverse Recovery Charge
Notes:
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
1. R
θJA
the drain pins. R
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
= 0 V, IS = 2.5 A (Note 2)
V
GS
I
= 23 A,
F
= 100 A/µs
d
iF/dt
20 V
11
mV/°C
µA
0.4 0.6 1.5 V
–3
2.2
2.7
3.4
3
3.5
4
6
5
mV/°C
mΩ
703 pF
Ω
77 123 ns
15 nC
0.6 1.2
V
55 nC
a) 40°C/W when
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
mounted on a 1in
of 2 oz copper
2
pad
b) 85°C/W when mounted on
a minimum pad of 2 oz
copper
FDS6064N7 Rev D2 (W)
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