FDD6530A
20V N-Channel PowerTrench MOSFET
July 2001
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
low gate charge, low RDS( ON) and fast switching speed.
Features
• 21 A, 20 V R
R
• Low gate charge (6.5 nC typical)
• Fast switching
= 32 mΩ @ VGS = 4.5 V
DS(ON)
= 47 mΩ @ VGS = 2.5 V
DS(ON)
Applications
• DC/DC converter
• Motor drives
• High performance trench technology for extremely
low R
DS(ON)
.
D
D
G
S
G
TO-252
S
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 20 V
Gate-Source Voltage ±8 V
Drain Current – Continuous (Note 3) 21 A
– Pulsed (Note 1a) 100
Power Dissipation (Note 1) 33
(Note 1a)
(Note 1b)
Operating and Storage Junction Temperature Range –55 to +175
3.3
1.6
W
°C
Thermal Characteristics
R
θJC
R
θJA
R
θJA
Thermal Resistance, Junction-to-Case (Note 1) 4.5
Thermal Resistance, Junction-to-Ambient (Note 1a) 45
Thermal Resistance, Junction-to-Ambient (Note 1b) 96
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDD6530A FDD6530A 13’’ 16mm 2500 units
2001 Fairchild Semiconductor Corporation
°C/W
°C/W
°C/W
FDD6630A Rev C (W)
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Drain-Source Avalanche Ratings (Note 2)
W
DSS
I
AR
Drain-Source Avalanche Energy Single Pulse, VDD = 10 V 55 mJ
Drain-Source Avalanche Current 8 A
Off Characteristics
BV
DSS
∆BVDSS
∆T
I
DSS
I
GSSF Gate–Body Leakage, Forward
I
GSSR Gate–Body Leakage, Reverse
Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA 20 V
Breakdown Voltage Temperature
Coefficient
J
ID = 250 µA, Referenced to 25°C
15
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1 µA
VGS = 8 V, VDS = 0 V 100 nA
VGS = –8 V, VDS = 0 V –100 nA
mV/°C
On Characteristics (Note 2)
V
GS(th)
∆VGS(th)
∆T
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage VDS = VGS, ID = 250 µA 0.4 0.9 1.2 V
Gate Threshold Voltage
Temperature Coefficient
J
Static Drain–Source
On–Resistance
ID = 250 µA, Referenced to 25°C
VGS = 4.5 V, ID = 8 A
VGS = 2.5 V, ID = 6.6 A
VGS = 4.5 V, ID = 8 A, TJ = 125°C
–3
26
36
36
On–State Drain Current VGS = 4.5 V, VDS = 5 V 20 A
Forward Transconductance VDS = 5 V, ID = 8 A 21 S
32
47
48
mV/°C
mΩ
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 710 pF
Output Capacitance 173 pF
Reverse Transfer Capacitance
VDS = 10 V, V
f = 1.0 MHz
GS
= 0 V,
84 pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
Turn–On Delay Time 8 16 ns
Turn–On Rise Time 7 14 ns
Turn–Off Delay Time 18 32 ns
Turn–Off Fall Time
g
gs
gd
Total Gate Charge 6.5 9 nC
Gate–Source Charge 1.3 nC
Gate–Drain Charge
VDD = 10 V, ID = 1 A,
VGS = 4.5 V, R
GEN
= 6
VDS = 10 V, ID = 8 A,
VGS = 4.5 V
4 8 ns
1.9 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current 2.7 A
Drain–Source Diode Forward
VGS = 0 V, IS = 2.7 A (Note 2) 0.8 1.2 V
Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
a) R
1in2 pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
D
3. Maximum current is calculated as:
where PD is maximum power dissipation at TC = 25°C and R
P
= 45°C/W when mounted on a
θJA
is at T
DS(on)
J(max)
b) R
θJA
on a minimum pad.
and VGS = 10V. Package current limitation is 21A
= 96°C/W when mounted
FDD6530A Rev. C (W)