Fairchild Semiconductor FDD5202P Datasheet

FDD5202P

(

)

P-Channel, Logic Level, MOSFET

FDD5202P

February 1999

PRELIMINARY

General Description

This P-Channel Logic level MOSFET is produced using
Fairchild Semiconductor's advanced process that has
been especially tailored to minimize the on state
resistance and yet maintain low gate charge for superior
switching performance.

Features

• -8 A, -60 V. R

R

= 0.3 Ω @ V

DS(on)

= 0.5 Ω @ V

DS(on)

• Low gate charge (15.5nC typical).

= -10 V

GS

= -4.5 V.

GS

• Fast switching speed.

Applications

• DC/DC converter

• Motor drives

• L.D.O.

S

D

G

G

S

TO-252

T

=25oC unless otherwise noted

Absolute Maximum Ratings

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

TJ, T

stg

Drain-Source Voltage -60 V
Gate-Source Voltage
Drain Current - Continuous

(Note 1a)

- Pulsed -15

Maximum Power Dissipation @ TC = 25oC

TA = 25oC
Operating and Storage Junction Temperature Range -55 to +150

A

TA = 25oC

Note 1

(Note 1)

(Note 1a)

(Note 1b)

D

20 V

±

-8

-2.3

39

2.8

1.3

A

W

C

°

Thermal Characteristics

R

JC

θ

R

JA

θ

Thermal Resistance, Junction-to- Case
Thermal Resistance, Junction-to- Ambient

(Note 1)
(Note 1b)

3.2
96

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDD5202P FDD5202P 13’’ 16mm 2500

1999 Fairchild Semiconductor Corporation

C/W

°

C/W

°

FDD5202P, Rev. A

FDD5202P

Electrical Characteristics

TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

DSS

BV

∆

T

J

∆

I

DSS

I

GSSF

I

GSSR

On Characteristics

V

GS(th)

GS(th)

V

∆

T

J

∆

R

DS(on)

I

D(on)

g

FS

Drain-Source Breakdown

VGS = 0 V, ID = -250 µA-60 V
Voltage
Breakdown Voltage

ID = -250 µA, Referenced to 25°C-60 mV/
Temperature Coefficient

Zero Gate Voltage Drain

VDS = -48 V, VGS = 0 V -1

A

µ

Current
Gate-Body Leakage Current,

VGS = 20V, VDS = 0 V 100 nA
Forward
Gate-Body Leakage Current,

VGS = -20 V, VDS = 0 V -100 nA
Reverse

(Note 2)

Gate Threshold Voltage VDS = VGS, ID = -250 µA-2-2.3-4V
Gate Threshold Voltage

ID = -250 µA, Referenced to 25°C3.2 mV/
Temperature Coefficient

Static Drain-Source
On-Resistance

VGS = -10 V, ID = -2.3 A

V

= -10 V, ID = -2.3 A,TJ=125°C

GS

V

= -4.5 V, ID = -1.8 A

GS

0.205

0.340

0.313

0.300

0.510

0.500

Ω

On-State Drain Current VGS = -10 V, VDS = -5 V -10 A
Forward Transconductance VDS = -5 V, ID = -2.3 A 3 S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance 560 pF
Output Capacitance 130 pF
Reverse Transfer Capacitance

V

= -30 V, VGS = 0 V,

DS

f = 1.0 MHz

35 pF

C

°

C

°

(Note 2)

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q

g

gs

gd

Turn-On Delay Time 8 15 ns
Turn-On Rise Time 20 40 ns
Turn-Off Delay Time 20 40 ns
Turn-Off Fall Time
Total Gate Charge 15.5 22 nC
Gate-Source Charge 2.4 nC
Gate-Drain Charge

V

= -30 V, ID = -1 A,

DD

V

= -10 V, R

GS

V

= -30 V, ID = -2.3 A,

DS

V

= -10 V

GS

GEN

= 6

Ω

Drain-Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the drain tab.

θJA

R

is guaranteed by design while R

θJC

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

Maximum Continuous Drain-Source Diode Forward Current -2.2 A
Drain-Source Diode Forward

VGS = 0 V, IS = -2.2 A

(Note 2)

Voltage

is determined by the user's board design.

θJA

b) R

a) R

= 45oC/W when mounted

θJA

on a 1in2 pad of 2oz copper.

= 96oC/W when mounted on

θJA

a 0.076 in2 pad of 2oz copper.

520ns

4.7 nC

-1 -1.3 V

FDD5202P, Rev. A