FDD3680
100V N-Channel PowerTrench MOSFET
February 2001
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
Features
• 25 A, 100 V. R
• Low gate charge (38 nC typical)
= 46 mΩ @ VGS = 10 V
DS(ON)
R
= 51 mΩ @ VGS = 6 V
DS(ON)
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
R
specifications.
DS(ON)
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
• Fast switching speed
• High performance trench technology for extremely
low R
DS(ON)
supply designs with higher overall efficiency.
• High power and current handling capability.
D
D
G
S
G
TO-252
S
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 100 V
Gate-Source Voltage
±20
Drain Current – Continuous (Note 1) 25 A
Drain Current – Pulsed 100
Maximum Power Dissipation (Note 1) 68
(Note 1a)
(Note 1b)
3.8
1.6
Operating and Storage Junction Temperature Range –55 to +175
V
W
°C
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance, Junction-to-Case (Note 1) 2.2
Thermal Resistance, Junction-to-Ambient (Note 1b) 96
°C/W
°C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDD3680 FDD3680 13’’ 16mm 2500 units
2001 Fairchild Semiconductor Corporation FDD3680 Rev B1(W)
Electrical Characteristics T
Zero Gate Voltage Drain Current
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Drain-Source Avalanche Ratings (Note 1)
W
DSS
I
AR
Single Pulse Drain-Source
Avalanche Energy
Maximum Drain-Source
Avalanche Current
VDD = 50 V, ID = 6.1 A 245 mJ
6.1 A
Off Characteristics
BV
DSS
∆BVDSS
∆T
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
J
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 80 V, VGS = 0 V 10
100 V
–101
mV/°C
µA
Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V
nA
On Characteristics (Note 2)
V
GS(th)
∆VGS( th)
∆T
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage VDS = VGS, ID = 250 µA 2 2.4 4 V
Gate Threshold Voltage
Temperature Coefficient
J
Static Drain–Source
On–Resistance
ID = 250 µA, Referenced to 25°C –6.5 mV/°C
VGS = 10 V, ID = 6.1 A
VGS = 10 V, ID = 6.1 A, TJ = 125°C
VGS = 6 V, ID = 5.8 A
32
61
34
46
92
51
m Ω
On–State Drain Current VGS = 10 V, VDS = 5 V 25 A
Forward Transconductance VDS = 5 V, ID = 6.1 A 25
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 1735 pF
Output Capacitance 176 pF
Reverse Transfer Capacitance
VDS = 50 V, V
f = 1.0 MHz
GS
= 0 V,
53 pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 14 25 ns
Turn–On Rise Time 8.5 17 ns
VDD = 50 V, ID = 1 A,
VGS = 10 V, R
GEN
= 10 Ω
Turn–Off Delay Time 63 94 ns
Turn–Off Fall Time
Total Gate Charge 38 53 nC
Gate–Source Charge 8.1 nC
VDS = 50 V, ID = 6.1 A,
VGS = 10 V
Gate–Drain Charge
21 34 ns
9.2 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
θJA
the drain pins. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Maximum Continuous Drain–Source Diode Forward Current 2.9 A
Drain–Source Diode Forward
Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
a) R
= 40oC/W when
θJA
mounted on a 1in2 pad of
2oz copper.
VGS = 0 V, IS = 2.9 A (Note 2) 0.73 1.3 V
is determined by the user's board design.
θCA
b) R
= 96oC/W on a
θJA
minimum mounting pad.
FDD3680 Rev B1(W)