FDD3670
100V N-Channel PowerTrench MOSFET
FDD3670
January 2000
ADVANCE INFORMATION
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/ DC
converters using either synchronous or conventional
switching PWM controllers.
Features
34 A, 100 V. R
•
Low gate charge (57 nC typical)
•
= 0.030 Ω @ VGS = 10 V
DS(ON)
= 0.033 Ω @ VGS = 6 V
R
DS(ON)
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
specifications.
R
DS(ON)
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
supply designs with higher overall efficiency.
Fast switching speed
•
High performance trench technology for extremely
•
low R
DS(ON)
High power and current handling capability.
•
D
D
G
S
G
TO-252
S
TA=25oC unless otherwise noted
Absolute Maximum Ratings
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 100 V
Gate-Source Voltage
Drain Current – Continuous
(Note 1)
20
±
34 A
Drain Current – Pulsed 100
Maximum Power Dissipation @ TC = 25°C
@ TA = 25°C
@ TA = 25°C
(Note 1)
(Note 1a)
(Note 1b)
70
3.2
1.3
Operating and Storage Junction Temperature Range -55 to +150
V
W
C
°
Thermal Characteristics
R
JC
θ
R
JA
θ
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
(Note 1)
(Note 1b)
1.8
96
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDD3670 FDD3670 13’’ 16mm 2500 units
2000 Fairchild Semiconductor Corpor ation
C/W
°
C/W
°
FDD3670 Rev A(W)
FDD3670
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
∆
∆
I
DSS
I
GSSF
I
GSSR
DSS
BV
T
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
DSS
Coefficient
J
Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V 25
Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V –100 nA
On Characteristics
V
∆
∆
R
I
D(on)
g
GS(th)
GS(th)
V
T
DS(on)
FS
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
J
Static Drain–Source
On–Resistance
On–State Drain Current VGS = 10 V, VDS = 5 V 25 A
Forward Transconductance VDS = 5 V, ID = 7.3 A 31 S
(Note 2)
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
V
= VGS, ID = 250 µA
DS
I
= 250 µA, Referenced to 25°C
D
VGS = 10 V, ID = 7.3 A
= 10 V, ID = 7.3 A
V
GS
V
= 6 V, ID = 7.0 A
GS
= 125°C
T
J
100 V
92
mV/°C
A
µ
22.54 V
–7.2
0.022
0.039
0.024
0.030
0.060
0.033
mV/°C
Ω
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 2490 pF
Output Capacitance 265 pF
Reverse Transfer Capacitance
V
= 50 V, V
DS
f = 1.0 MHz
GS
= 0 V,
80 pF
Switching Characteristics
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 16 26 ns
Turn–On Rise Time 10 18 ns
Turn–Off Delay Time 56 84 ns
Turn–Off Fall Time
Total Gate Charge 57 80 nC
Gate–Source Charge 11 nC
Gate–Drain Charge
(Note 2)
V
= 50 V, ID = 1 A,
DD
= 10 V, R
V
GS
V
= 50 V, ID = 25 A,
DS
= 10 V
V
GS
GEN
= 6
Ω
25 40 ns
15 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
R
1.
JA
θ
the drain pins. R
Scale 1 : 1 on letter size paper
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
2.
Maximum Continuous Drain–Source Diode Forward Current 2.7 A
Drain–Source Diode Forward
Voltage
is guaranteed by design while R
JC
θ
a) R
= 40oC/W when
JA
θ
mounted on a 1in2 pad of
2oz copper.
V
= 0 V, IS = 2.7 A
GS
is determined by the user's board design.
CA
θ
(Note 2)
b) R
= 96oC/W on a
JA
θ
minimum mounting pad.
1.2 V
FDD3670 Rev A(W)