Fairchild Semiconductor FDD2612 Datasheet

FDD2612
200V N-Channel PowerTrench

MOSFET
FDD2612
August 2001
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/ DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low R
and fast switching speed.
DS(ON)
Applications
DC/DC converter
Features
4.9 A, 200 V. R
High performance trench technology for extremely
low R
DS(ON)
High power and current handling capability
Fast switching speed
= 720 m @ VGS = 10 V
DS(ON)
Low gate charge (8nC typical)
D
D
G
S
G
TO-252
S
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 200 V Gate-Source Voltage
± 20
Drain Current – Continuous (Note 1a) 4.9 A
– Pulsed 10
Power Dissipation (Note 1) 42
(Note 1a) (Note 1b)
Operating and Storage Junction Temperature Range
3.8
1.6
55 to +175 °C
V
W
Thermal Characteristics
R
θJC
R
θJA
R
θJA
Thermal Resistance, Junction-to-Case (Note 1) 3.5 Thermal Resistance, Junction-to-Ambient (Note 1a) 40 Thermal Resistance, Junction-to-Ambient (Note 1b) 96
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDD2612 FDD2612 13’’ 16mm 2500 units
2001 Fairchild Semiconductor Corporation
°C/W °C/W °C/W
FDD2612 Rev B1 (W)
FDD2612
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2)
W
DSS
I
AR
Drain-Source Avalanche Energy Single Pulse,VDD = 100 V,ID = 1.5A 90 mJ Drain-Source Avalanche Current 1.5 A
Off Characteristics
BV
DSS
BVDSST
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
Zero Gate Voltage Drain Current VDS = 160 V, VGS = 0 V 1 Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = –20 V , VDS = 0 V –100 nA
200 V
246
mV/°C
On Characteristics (Note 2)
V
GS(th)
VGS(th)T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage Gate Threshold Voltage
Temperature Coefficient Static Drain–Source
On Resistance
= VGS, ID = 250 µA
V
DS
I
= 250 µA, Referenced to 25°C
D
= 10 V, ID = 1.5 A
V
GS
= 10 V, ID = 1.5 A,TJ = 125°C
V
GS
On–State Drain Current VGS = 10 V, VDS = 10 V 5 A Forward Transconductance VDS = 10 V, ID = 1.5 A 4.4 S
244.5V – 8.6
600
1125
mV/°C
720
1422
Dynamic Characteristics
V
C
iss
C
oss
C
rss
Input Capacitance 234 pF Output Capacitance 18 pF Reverse Transfer Capacitance
= 100 V, V
DS
f = 1.0 MHz
GS
= 0 V,
8pF
Switching Characteristics (Note 2)
= 100 V, ID = 1 A,
t t t t Q Q Q
d(on)
r
d(off)
f
Turn–On Delay Time 6 12 ns Turn–On Rise Time 6 12 ns Turn–Off Delay Time 17 30 ns Turn–Off Fall Time
g
gs
gd
Total Gate Charge 8 11 nC Gate–Source Charge 1.6 nC Gate–Drain Charge
V
DD
= 10 V, R
V
GS
V
= 100 V, ID = 1.5 A,
DS
V
= 10 V
GS
GEN
= 6
816ns
2.2 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current 3.2 A Drain–Source Diode Forward
Voltage
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
= 0 V, IS = 3.2 A (Note 2) 0.8 1.2 V
V
GS
µA
m
a) R
1in
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
P
D
3. Maximum current is calculated as: where PD is maximum power dissipation at TC = 25°C and R
R
)ON(DS
= 40°C/W when mounted on a
θJA
2
pad of 2 oz copper
is at T
DS(on)
J(max)
b) R
θJA
on a minimum pad.
and VGS = 10V. Package current limitation is 21A
= 96°C/W when mounted
FDD2612 Rev B1(W)
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