Fairchild Semiconductor FDD2512 Datasheet

FDD2512
150V N-Channel PowerTrench

MOSFET
FDD2512
August 2001
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/ DC converters using either synchronous or conventional switching PWM controllers. These MOSFETs feature faster switching and lower gate charge than other MOSFETs with comparable R result is a MOSFET that is easy and safer to drive
specifications. The
DS(ON)
Features
6.7 A, 150 V R R
Low gate charge (8nC typical)
Fast switching
= 420 m @ VGS = 10 V
DS(ON)
= 470 m @ VGS = 6 V
DS(ON)
(even at very high frequencies), and DC/DC power supply designs with higher overall efficiency.
High performance trench technology for extremely
low R
DS(ON)
.
D
D
G
S
G
TO-252
S
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 150 V Gate-Source Voltage
±20
Drain Current – Continuous (Note 3) 6.7 A
– Pulsed (Note 1a) 20
Power Dissipation (Note 1) 42
(Note 1a) (Note 1b)
Operating and Storage Junction Temperature Range
3.8
1.6
55 to +175 °C
V
W
Thermal Characteristics
R
θJC
R
θJA
R
θJA
Thermal Resistance, Junction-to-Case (Note 1) 3.5 Thermal Resistance, Junction-to-Ambient (Note 1a) 40 Thermal Resistance, Junction-to-Ambient (Note 1b) 96
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDD2512 FDD2512 13’’ 16mm 2500 units
2001 Fairchild Semiconductor Corporation
°C/W °C/W °C/W
FDD2512 Rev B2(W)
FDD2512
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2)
W
DSS
I
AR
Drain-Source Avalanche Energy Single Pulse,VDD = 75 V, ID = 2.2A 90 mJ Drain-Source Avalanche Current 2.2 A
Off Characteristics
BV
DSS
BVDSST
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage Breakdown Voltage Temperature
= 0 V, ID = 250 µA
V
GS
ID = 250 µA, Referenced to 25°C
Coefficient Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 V 1 Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = –20 V, VDS = 0 V –100 nA
150 V
147
mV/°C
On Characteristics (Note 2)
V
GS(th)
VGS(th)T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage Gate Threshold Voltage
Temperature Coefficient Static Drain–Source
On–Resistance
= VGS, ID = 250 µA
V
DS
= 250 µA, Referenced to 25°C
I
D
VGS = 10 V, ID = 2.2 A
= 6 V, ID = 2.0 A
V
GS
= 10 V, ID = 2.2 A,TJ = 125°C
V
GS
On–State Drain Current VGS = 10 V, VDS = 10 V 5 A Forward Transconductance VDS = 10 V, ID = 2.2 A 6.5 S
22.64 V –5.6
307 322 606
420 470 870
mV/°C
m
Dynamic Characteristics
V
C
iss
C
oss
C
rss
Input Capacitance 344 pF Output Capacitance 22 pF Reverse Transfer Capacitance
= 75 V, V
DS
f = 1.0 MHz
GS
= 0 V,
9pF
Switching Characteristics (Note 2)
V
t t t t Q Q Q
d(on)
r
d(off)
f
Turn–On Delay Time 6.5 13 ns Turn–On Rise Time 3.5 7 ns Turn–Off Delay Time 22 33 ns Turn–Off Fall Time
g
gs
gd
Total Gate Charge 8 11 nC Gate–Source Charge 1.5 nC Gate–Drain Charge
= 75 V, ID = 1 A,
DD
V
= 10 V, R
GS
V
= 75 V, ID = 2.2 A,
DS
= 10 V
V
GS
GEN
= 6
48ns
2.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current 3.2 A Drain–Source Diode Forward
VGS = 0 V, IS = 3.2 A (Note 2) 0.8 1.2 V
Voltage
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
µA
a) R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
P
D
3. Maximum current is calculated as: is maximum power dissipation at TC = 25°C and R
where P
D
R
)ON(DS
= 40°C/W when mounted on a
θJA
2
pad of 2 oz copper
1in
is at T
DS(on)
J(max)
b) R
θJA
on a minimum pad.
and VGS = 10V. Package current limitation is 21A
= 96°C/W when mounted
FDD2512 Rev B2(W)
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