Fairchild Semiconductor FDC6318P Datasheet
December 2001
FDC6318P
Dual P-Channel 1.8V PowerTrench
Specified MOSFET
FDC6318P
General Description
These P-Channel 1.8V specified MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize on-state resistance and yet maintain low
gate charge for superior switching performance.
Applications
• Power management
• Load switch
Features
• –2.5 A, –12 V. R
R
R
• High performance trench technology for extremely
low R
• SuperSOT
smaller than standard SO-8); low profile (1mm thick)
DS(ON)
TM
-6 package: small footprint (72%
= 90 mΩ @ VGS = –4.5 V
DS(ON)
= 125 mΩ @ VGS = –2.5 V
DS(ON)
= 200 mΩ @ VGS = –1.8 V
DS(ON)
D2
D1
S1
4
5
3
2
G2
SuperSOT -6
TM
S2
G1
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
6
1
Symbol Parameter Ratings Units
V
Drain-Source Voltage –12 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1a) –2.5 A
– Pulsed –7
PD
TJ, T
STG
Power Dissipation for Single Operation (Note 1a) 0.96
(Note 1b)
Operating and Storage Junction Temperature Range –55 to +150
(Note 1c)
±8
0.9
0.7
V
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a) 130
(Note 1) 60
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
2001 Fairchild Sem iconductor Corporation
.318 FDC6318P 13’’ 12mm 3000 units
°C/W
°C/W
FDC6318P Rev D (W )
FDC6318P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
∆BVDSS
∆T
I
Zero Gate Voltage Drain Current VDS = –10 V, VGS = 0 V –1
DSS
I
GSSF
I
GSSR
Breakdown Voltage Temperature
Coefficient
J
Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –8 V, VDS = 0 V –100 nA
= 0 V, ID = –250 µA
V
GS
I
= –250 µA, Referenced to 25°C
D
–12 V
–2.9
mV/°C
µA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
I
On–State Drain Current VGS = –4.5 V, VDS = –5 V –6 A
D(on)
= VGS, ID = –250 µA
V
DS
= –250 µA, Referenced to 25°C
I
D
VGS = –4.5 V, ID = –2.5 A
= –2.5 V, ID = –2 A
V
GS
= –1.8 V, ID = –1.6 A
V
GS
= –4.5 V, ID = –2.5A, TJ=125°C
V
GS
gFS Forward Transconductance VDS = –5 V, ID = –2.5 A 8 S
–0.4 –0.7 –1.5 V
2.3
69
93
135
85
90
125
200
120
mV/°C
mΩ
Dynamic Characteristics
C
Input Capacitance 455 pF
iss
C
Output Capacitance 194 pF
oss
C
Reverse Transfer Capacitance
rss
= –6 V, V
V
DS
f = 1.0 MHz
= 0 V,
GS
134 pF
Switching Characteristics (Note 2)
t
Turn–On Delay Time 9 18 ns
d(on)
tr Turn–On Rise Time 14 25 ns
t
Turn–Off Delay Time 21 34 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 5.4 8 nC
Qgs Gate–Source Charge 1.1 nC
Qgd Gate–Drain Charge
= –6 V, ID = –1 A,
V
DD
= –4.5 V, R
V
GS
= –6 V, ID = –2.5 A,
V
DS
V
= –4.5 V
GS
GEN
= 6 Ω
17 31 ns
1.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –0.8 A
VSD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Drain–Source Diode Forward
Voltage
is guaranteed by design while R
θJC
a) 130 °C/W when
mounted on a 0.125
2
in
pad of 2 oz.
copper.
θCA
VGS = 0 V, IS = –0.8 A (Note 2) –0.7 –1.2 V
is determined by the user's board design.
b) 140°C/W when mounted
on a .004 in
copper
2
pad of 2 oz
c) 180°C/W when mounted on a
mini mum pa d.
FDC6318P Rev D (W )
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