Fairchild Semiconductor FDC6310P Datasheet
G2
FDC6310P
FDC6310P
Dual P-Channel 2.5V Specified PowerTrench MOSFET
April 2001
General Description
These P-Channel 2.5V specified MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize on-state resistance and yet maintain low
gate charge for superior switching performance.
These devices have been designed to offer exceptional
power dissipation in a very small footprint for
applications where the bigger more expensive SO-8
and TSSOP-8 packages are impractical.
Applications
• Load switch
• Battery protection
• Power management
Features
• –2.2 A, –20 V. R
R
• Low gate charge
• Fast switching speed
• High performance trench technology for extremely
low RDS(ON)
• SuperSOT TM -6 package: small footprint 72%
smaller than standard SO-8); low profile (1mm thick)
= 125 m Ω @ VGS = –4.5 V
DS(ON)
= 190 mΩ @ VGS = –2.5 V
DS(ON)
D2
S1
4
3
D1
2
1
SuperSOT -6
TM
S2
G1
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
5
6
Symbol Parameter Ratings Units
V
Drain-Source Voltage –20 V
DSS
V
Gate-Source Voltage ±12 V
GSS
ID Drain Current – Continuous (Note 1a) –2.2 A
– Pulsed –6
PD
TJ, T
STG
Power Dissipation for Single Operation (Note 1a) 0.96
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range –55 to +150 °C
0.9
0.7
W
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 130
Thermal Resistance, Junction-to-Case (Note 1) 60
°C/W
°C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.310 FDC6310P 7’’ 8mm 3000 units
2001 Fairchild Semiconductor Corporation FDC6310P Rev C(W)
FDC6310P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA –20 V
DSS
∆BVDSS
∆TJ
I
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1 µA
DSS
I
GSSF
I
GSSR
Breakdown Voltage Temperature
Coefficient
ID = –250 µA, Referenced to 25°C –11 mV/°C
Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –12 V, VDS = 0 V –100 nA
On Characteristics (Note 2)
V
Gate Threshold Voltage VDS = VGS, ID = –250 µA –0.6 –1.0 –1.5 V
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
I
D(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = –250 µA, Referenced to 25°C
VGS = –4.5 V, ID = –2.2 A
VGS = –2.5 V, ID = –1.8 A
VGS=–4.5 V, ID =–2.2 A, TJ=125°C
3 mV/°C
100
125
145
137
m Ω
190
184
On–State Drain Current VGS = –4.5 V, VDS = –5 V –6 A
gFS Forward Transconductance VDS = –5 V, ID = –3.5 A 6 S
Dynamic Characteristics
C
Input Capacitance 337 pF
iss
C
Output Capacitance 88 pF
oss
C
Reverse Transfer Capacitance
rss
VDS = –10 V, V
f = 1.0 MHz
= 0 V,
GS
51 pF
Switching Characteristics (Note 2)
t
Turn–On Delay Time 9 18 ns
d(on)
tr Turn–On Rise Time 12 22 ns
t
Turn–Off Delay Time 10 20 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 3.7 5.2 nC
Qgs Gate–Source Charge 0.65 nC
Qgd Gate–Drain Charge
VDD = –10 V, ID = –1 A,
VGS = –4.5 V, R
GEN
= 6 Ω
VDS = –10 V, ID = –2.2 A,
VGS = –4.5 V
5 10 ns
1.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –0.8 A
VSD Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = –0.8 A (Note 2)
0.77
–1.2 V
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
is guaranteed by design while R
θJC
a) 130 °C/W when
mounted on a 0.125
in2 pad of 2 oz.
copper.
is determined by the user's board design.
θCA
b) 140°/W when mounted
on a .004 in2 pad of 2 oz
copper
c) 180°/W when mounted on a
minimum pad.
FDC6310P Rev C(W)
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