Fairchild Semiconductor FDC606P Datasheet

December 2001

FDC606P

P-Channel 1.8V Specified PowerTrench



MOSFET

FDC606P

General Description

This P-Channel 1.8V specified MOSFET uses
Fairchild’s low voltage PowerTrench process. It has
been optimized for battery power management
applications.

Applications

• Battery management

• Load switch

• Battery protection

Features

• –6 A, –12 V. R

R

R

• Fast switching speed

• High performance trench technology for extremely

low R

DS(ON)

= 26 mΩ @ VGS = –4.5 V

DS(ON)

= 35 mΩ @ VGS = –2.5 V

DS(ON)

= 53 mΩ @ VGS = –1.8 V

DS(ON)

S

D

D

1

2

6

5

G

SuperSOT -6

TM

D

D

Absolute Maximum Ratings T

o

=25

C unless otherwise noted

A

3

4

Symbol Parameter Ratings Units

V

Drain-Source Voltage –12 V

DSS

V

Gate-Source Voltage

GSS

ID Drain Current – Continuous (Note 1a) –6 A

– Pulsed –20

Maximum Power Dissipation (Note 1a) 1.6 W PD

TJ, T

Operating and Storage Junction Temperature Range –55 to +150

STG

(Note 1b)

±8

0.8

V

°C

Thermal Characteristics

R

θJA

R

θJC

Thermal Resistance, Junction-to-Ambient

Thermal Resistance, Junction-to-Case

(Note 1a) 78

(Note 1) 30

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

.606 FDC606P 7’’ 8mm 3000 units

2001 Fairchild Sem iconductor Corporation

°C/W

°C/W

FDC606P Rev E (W )

FDC606P

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

Drain–Source Breakdown Voltage

DSS

∆BVDSS
∆T

I

Zero Gate Voltage Drain Current VDS = –10 V, VGS = 0 V –1

DSS

I

GSSF

I

GSSR

Breakdown Voltage Temperature
Coefficient

J

Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA

Gate–Body Leakage, Reverse VGS = –8 V, VDS = 0 V –100 nA

V

= 0 V, ID = –250 µA

GS

= –250 µA,Referenced to 25°C

I

D

–12 V

–3

mV/°C

µA

On Characteristics (Note 2)

V

Gate Threshold Voltage

GS(th)

∆VGS(th)
∆TJ

R

DS(on)

Gate Threshold Voltage
Temperature Coefficient

Static Drain–Source

On–Resistance

I

On–State Drain Current VGS = –4.5 V, VDS = –5 V –20 A

D(on)

V

= VGS, ID = –250 µA

DS

= –250 µA,Referenced to 25°C

I

D

VGS = –4.5 V, ID = –6 A
V

= –2.5 V, ID = –5 A

GS

= –1.8 V, ID = –4 A

V

GS

= –4.5 V, ID = –6 A,TJ=125°C

V

GS

–0.4 –0.5 –1.5 V

2.5

21

26
34
28

26
35
53
35

mV/°C

mΩ

gFS Forward Transconductance VDS = –5 V, ID = –6 A 25 S

Dynamic Characteristics

C

Input Capacitance 1699 pF

iss

C

Output Capacitance 679 pF

oss

C

Reverse Transfer Capacitance

rss

= –6 V, V

V

DS

f = 1.0 MHz

= 0 V,

GS

423 pF

Switching Characteristics (Note 2)

t

Turn–On Delay Time 11 19 ns

d(on)

tr Turn–On Rise Time 10 20 ns

t

Turn–Off Delay Time 89 142 ns

d(off)

tf Turn–Off Fall Time

Qg Total Gate Charge 18 25 nC

Qgs Gate–Source Charge 3 nC

Qgd Gate–Drain Charge

= –6 V, ID = –1 A,

V

DD

= –4.5 V, R

V

GS

= –6 V, ID = –6 A,

V

DS

V

= –4.5 V

GS

GEN

= 6 Ω

70 112 ns

4.2 nC

Drain–Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain–Source Diode Forward Current –1.3 A

VSD Drain–Source Diode Forward

Voltage

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain

θJA

pins. R

a. 78°C/W when mounted on a 1in

b. 156°C/W when mounted on a minimum pad.

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycl e ≤ 2.0%

is guaranteed by design while R

θJC

2

pad of 2oz copper on FR-4 board.

is determined by the user's board design.

θCA

VGS = 0 V, IS = –1.3 A (Note 2) –0.6 –1.2 V

FDC606P Rev E (W )