Fairchild Semiconductor FDC602P Datasheet
FDC602P
P-Channel 2.5V Specified PowerTrench
MOSFET
FDC602P
November 1999
ADVANCE INFORMATION
General Description
This P-Channel 2.5V specif ied MOSFE T uses a rugged
gate version of Fairchild’s advanced PowerTrench
process. It has been opt imized for power management
applications with a wide range of gate drive voltage
(2.5V – 12V).
Applications
•= Battery management
•= Load switch
•= Battery protection
Features
•= –5.5 A, –12 V R
R
•= Fast switching speed.
•= High performance trench te chnology for extremely
low R
DS(ON)
.
= 0.033 Ω @ VGS = –4.5 V
DS(ON)
= 0.052 Ω @ VGS = –2.5 V
DS(ON)
S
D
D
1
2
6
5
G
SuperSOT -6
TM
D
D
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
3
4
Symbol Parameter Ratings Units
V
Drain-Source Voltage –12 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1a) -5.5 A
– Pulsed -30
Maximum Power Dissipation (Note 1a) 1.6 W PD
TJ, T
Operating and Storage Junction Temperature Range -55 to +150
STG
(Note 1b)
±12
0.8
V
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a) 78
(Note 1) 30
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.602 FDC602P 7’’ 8mm 3000 units
1999 Fairchild Semiconductor Corporation
°C/W
°C/W
FDC602P Rev A
FDC602P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
I
Zero Gate Voltage Drain Current VDS = –10 V, VGS = 0 V –1
DSS
I
Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA
GSSF
I
Gate–Body Leakage, Reverse VGS = –12 V VDS = 0 V –100 nA
GSSR
V
= 0 V, ID = –250 µA
GS
–12 V
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
R
Static Drain–Source
DS(on)
On–Resistance
V
= VGS, ID = –250 µA
DS
VGS = –4.5 V, ID = –5.5 A
= –2.5 V, ID = –4.4 A
V
GS
–0.6 –1.5 V
0.033
0.052
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –1.3 A
VSD Drain–Source Diode Forward
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain
θJA
pins. R
is guaranteed by design while R
θJC
a. 78°C/W when mounted on a 1in2 pad of 2oz copper on FR-4 board.
b. 156°C/W when mounted on a minimum pad.
2. Pulse Test: Pulse Width ≤=300 µs, Duty Cycle ≤=2.0%
is determined by the user's board design.
θCA
VGS = 0 V, IS = –1.3 A (Note 2) –1.2 V
µA
Ω
FDC602P Rev A
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