Fairchild Semiconductor FAN8006D3 Datasheet

FAN8006D3

4-CH Motor Driver

www.fairchildsemi.com

Features

• 4-Channel BTL (Balanced transformer-less) driver
• Built-in thermal shutdown circuit
• Built-in power save circuit
• Separated power suppl y
• Corresponds to 3.3V or 5V DSP

Description

The FAN8006D3 is a monolithic integrated circuit, suitable for 4-CH motor driver which drives focus actuator, tracking actuator, sled motor and loading motor of a CD-media sys­tem.

28-SSOPH-375SG2

Target Application

• Compact disk player
• Digital video disk player
• Compact disk ROM

Ordering Information

Device Package Ope. Temp.
FAN8006D3 28-SSOPH-375SG2 35°C ~ +85°C

FAN8006D3TF

28-SSOPH-375SG2 35°C ~ +85°C

Rev . 1.0.0
©2002 Fairchild Semiconductor Corporation
FAN8006D3

FAN8006D3 Pin Assignments

−)
PreVcc
OPIN4(+)
OPIN4(
262728
123
BIAS
−)
OPIN1(
OPIN1(+)
−)
OPOUT4
OPIN3(+)
OPIN3(
232425
OPOUT3
FIN(GND)
STBY1
GND
−)
VO3(
PowVcc3 CH3/4
19202122
FAN8006D3
567 8910111213
4
−)
VO2(
PowVcc CH2
IN2
OPOUT1
MUTE
STBY2
FIN(GND)
GND
PowVcc CH1
−)
VO3(+)
VO4(
VO4(+)
15161718
14
−)
VO2(+)
VO1(+)
VO1(
2

Pin Defi ni ti o n s

Pin Number Pin Name I/O Pin Function Description

1 BIAS I Bias voltage input 2 OPIN1(+) I Op-amp CH1 input (+) 3OPIN1(−) I Op-amp CH1 input (−) 4 OPOUT1 O Op-amp CH1 output 5 IN2 I CH2 input 6 MUTE I CH1 mute control when STBY1 is logic high 7 STBY2 I CH2 standby control 8 GND - Signal ground

9 PowVcc1 CH1 - BTL CH1 power supply 10 PowVcc2 CH2 - BTL CH2 power supply 11 VO2( 12 VO2( 13 VO1( 14 VO1( 15 VO4(+) O Drive4 output ( 16 VO4(−) O Drive4 output ( 17 VO3(+) O Drive3 output ( 18 VO3(−) O Drive3 output ( 19 PowVcc3 CH3/4 - BTL CH3/4 power supply 20 STBY1 I Input for CH1/3/4 standby control 21 GND - Ground 22 OPOUT3 O Op-amp CH3 output 23 OPIN3() I Op-amp CH3 input () 24 OPIN3(+) I Op-amp CH3 input (+) 25 O POUT4 O Op-amp CH4 output 26 OPIN4() I Op-amp CH4 input () 27 OPIN4(+) I Op-amp CH4 input (+) 28 PreVcc - Vcc for pre block

−) +)
−) +)
O Drive2 output (−) O Drive2 output (+) O Drive1 output (−) O Drive1 output (+)
+
− +
) ) ) )
FAN8006D3
3
FAN8006D3

Internal Bl oc k Diag r am

PreVcc
OPIN4(+)
OPIN4(−)
OPOUT4
FIN
OPIN3(−)
OPIN3(+)
(GND)
OPOUT3
STBY1
GND
PowVcc3 CH3/4
VO3(−)
VO3(+)
VO4(−)
VO4(+)
1516171819202122232425262728
+
20k
10k
10k
+
+
-
1234567 891011121314
BIAS
OPIN1(+)
+
+
20k
OPIN1(−)
OPOUT1
+
IN2
TSD
20k
10k
10k
MUTE
+
+
20k
(GND)
FIN
STBY2
GND
10k
10k
LEVEL SHIFT
PowVcc CH2
10k
PowVcc CH1
-
10k
+
+
+
PowVcc CH2
10k
10k
PowVcc
LEVEL SHIFT
+
10k
+
10k
+
+
+
CH3/4
VO2(−)
10k
-
10k
LEVEL SHIFT
PowVcc CH1
10k
VO2(+)
10k
+
VO1(−)
10k
10k
+
+
+
PowVcc
CH3/4
LEVEL SHIFT
10k
+
VO1(+)
+
−+
10k
+
4

Equivalent Circuits (Continued)

POWER OUTPUT CHANNEL OPAMP INPUT
FAN8006D3
28
9 10
19
11 12 13 14 15 16 17 18
28
2
25
24 27
2K
1K
CHANNEL OP-AMP OUTPUT BIAS INPUT
28
20K
10K
27p
25
20K
4 22 25
20K
28
25
1
2K
1K
28
28
3
25
23 26
CHANNEL 2 INPUT ST ANDBY 1/2 INPUT
28
28
25
5
10K
1K
20K
20K
20K
1K
1K
7
1K
28
25
40K
100K
20K
40K
28
20K
40K
28
25
20K
40K
20
100K
20K
80K
20K
5
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