Fairchild Semiconductor DM74123N Datasheet
DM74123
Dual Retriggerable One-Shot with
Clear and Complementary Outputs
DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs
August 1986
Revised March 2000
General Description
The DM74123 is a dual retriggerable monostable multivibrator capable of generating output pulses from a few
nano-seconds to extremel y long duration up to 100 % duty
cycle. Each device has three inputs permitting the choice of
either leading-edge or trailing edge triggering. Pin (A) is an
active-LOW transition t rigg er i n pu t an d p in (B ) is an acti v eHIGH transition trigge r input. A LOW at the clear (CLR)
input terminates the outp ut pulse: which also inhibits tr iggering. An interna l connection from CLR to the in put gate
makes it possible to trigger the circuit by a positive-going
signal on CLR as shown in the Truth Table.
To obtain the best and trouble free operation from this
device please read the Operating Rules as well as the
One–Shot Application Notes carefully and observe recommendations.
Features
■ DC triggered from active- HIGH tra nsition o r active -LOW
transition inputs
■ Retriggerable to 100% duty cycle
■ Direct reset terminates output pulse
■ Compensated for V
■ DTL, TTL compatible
■ Input cl amp diodes
and temperature variations
CC
Ordering Code:
Order Number Package Number Package Description
DM74123N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram Triggering Truth Table
ABCLR
X X L No Trigger
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
LH
Inputs
L X No Trigger
H H Trigger
Response
X No Trigger
H Trigger
Trigger
Functional Description
The basic output pulse w idth is determ ined by sele ction of
an external resistor (R
gered, the basic pulse width may be extended by retriggering the gated active-LOW transition or active-HIGH
transition inputs or be reduced by use of the a ctive-LOW
© 2000 Fairchild Semiconductor Corporation DS006539 www.fairchildsemi.com
) and capacitor (CX). Once trig-
X
transition clear input. Retriggering to 100% du ty cycle is
possible by application of an input pulse train who se cycle
time is shorter than the outpu t cycle time such that a c ontinuous “HIGH” logic state is maintained at the “Q” output.
Operating Rules
1. An external resistor (RX) and external capac itor (CX)
are required for pr op er o per ati o n. T he val ue of C
vary from 0 to any necessary value. For small time con-
DM74123
stants high-grade mica, glass, polypr opylene, polycarbonate, or polystyrene material capacitors may be
used. For large time constants use tantalum or special
aluminum capacitors. If the timing capacitors have
leakages approach ing 100 nA or if stray capacitan ce
from either terminal to ground is greater than 50 pF the
timing equations may not represent the pulse width the
device generates.
2. When an electrol ytic capa ci to r is used for C
ing diode is often requi red for standa rd TTL one-shots
to prevent high inverse leakage current (Figure 1).
However, its use in general is not recommended with
retriggerable operation.
3. The output pulse width (T
) for CX > 1000 pF is
W
defined as follows:
= K RX CX(1 + 0.7/RX)
T
W
1. where: [R
is in Kilo-ohm]
X
is in pico Farad]
[C
X
is in nano second]
[T
W
[K ≈ 0.28]
FIGURE 1.
4. For C
< 1000 pF see Figure 2 for TW vs. C
X
family curves with RX as a parameter:
Pulse Width vs. R
and C
X
X
X
may
X
a switch-
5. To obtain variable pulse width by remote trimming, the following circuit is recommended:
Note: “R
” should be as close to th e one-shot as possible .
remote
FIGURE 3.
6. The retriggerable pulse width is calculated as
shown below:
+ t
W
PLH
= K× RX × CX + t
PLH
T = T
The retriggered pulse width is equal to the
pulse width plus a dela y time period (Figure
4).
FIGURE 4.
7. Under any operating condition C
must be kept as close to the one-shot device
pins as possible to minimize stray capacitance, to reduce noise pi ck-up, and to red uce
I × R and Ldi/dt voltage developed along their
connecting paths. If the lead length from C
pins (6) and (7) or pins (14) and (15) is greater
than 3 cm, for example, the output pulse width
X
might be quite di fferent from va lues pr edicted
from the appr opriate equation s. A non-inductive and low capacitive path is necessary to
ensure complete discharge of C
cycle of its operation so th at the output p ulse
width will be accurate.
8. V
and ground wiring should conform to
CC
good high-frequency standards and practices
so that switching trans ients on the V
ground return leads do not cause interaction
between one-shots. A 0.01 µF to 0.10 µF
bypass capacitor (d isk ceramic or monolithic
type) from V
to ground is necessary on
CC
each device. Furthermore, the byp ass cap acitor should be located as close to the V
as space permits.
Note: For further detail ed device characte ristics and output pe rformance
please refer to the On e-Shot Application Not e, AN-366.
and R
X
in each
X
CC
CC
X
and
pin
X
to
FIGURE 2.
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