Fairchild Semiconductor 74VHC164MSCX, 74VHC164M, 74VHC164CW, 74VHC164SJX, 74VHC164SJ Datasheet
...
August 1993
Revised April 1999
74VHC164 8-Bit Serial-In, Parallel-Out Shift Register
© 1999 Fairchild Semiconductor Corporation DS011636.prf www.fairchildsemi.com
74VHC164
8-Bit Serial-In, Parallel-Out Shift Register
General Description
The VHC164 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissipation. The VHC164 is a high-s peed 8-Bit Serial-In /Parallel-Out Shift Register. Serial data is e ntered through a 2input AND gate synchronous with the LOW-to-HIGH transition of the clock. The device features an asynchronous
Master Reset whic h clears the r egister, setting all outp uts
LOW independent of the clock. An input protection circuit
insures that 0V to 7V can be ap pli ed to th e in pu t p in s wi t hout regard to the supp ly voltage. T his device can be used
to interface 5V to 3V systems and two supply systems such
as battery backup. T his circuit prevents d evice destru ction
due to mismatched supply and input voltages.
Features
■ High Speed: f
MAX
= 175 MHz at VCC = 5V
■ Low power dissipation: I
CC
= 4 µA (max) at TA= 25 °C
■ High noise immunity: V
NIH
= V
NIL
= 28% VCC (min)
■ Power down protection provided on all inputs
■ Low noise: V
OLP
= 0.8V (max)
■ Pin and function compatible with 74HC164
Ordering Code:
Surface mount pack ages are also available on Tape and Reel. Specify by appending the s uffix let te r “X” to the ordering code .
Logic Symbol Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74VHC164M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74VHC164SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC164MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC164N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A, B Data Inputs
CP Clock Pulse Input (Active Rising Edge)
MR
Master Reset Input (Active LOW)
Q
0–Q7
Outputs
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74VHC164
Functional Description
The VHC164 is an e dge-triggered 8-bit shi ft register with
serial data entry and an output from each of the eight
stages. Data is entere d serially through one of tw o inputs
(A or B); either of t hese inputs can be used as a n active
High Enable for data entry through the other input. An
unused input must be tied HIGH.
Each LOW-to-HIGH transition on the Clock (CP) input
shifts data one place to the right and enters into Q
0
the log-
ical AND of the two data inputs (A • B) that existed before
the rising clock edg e. A LOW level on the Master Reset
(MR
) input overrides all other inputs and clears the register
asynchronously, forcing all Q outputs LOW.
Function Table
H = HIGH Voltage Levels
L = LOW Voltage Levels
X = Immaterial
Q = Low er cas e letter s indic ate th e sta te of t he refe renced input or out put
one setup time prior to t he LOW-to-HIGH clock tr ansition.
Logic Diagram
Please note that this diagram is provided o nly f or t he understanding of logic operations and shou ld not be used to estimate pro pagation delays.
Operating Inputs Outputs
Mode
MR
ABQ0Q1–Q
7
Reset (Clear) L X X L L–L
Shift H L L L Q
0–Q6
HLHLQ0–Q
6
HHL LQ0–Q
6
HHHHQ0–Q
6
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74VHC164
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power
supply, temperature, and ou tput/inp ut load ing vari ables. Fairchild does n ot
recommend operat ion of circuits outside dat abook specifications.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
Note 3: Parameter gu aranteed by design.
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Voltage (V
IN
) −0.5V to + 7.0V
DC Output Voltage (V
OUT
) −0.5V to VCC + 0.5V
DC Diode Current (I
IK
) −20 mA
Output Diode Current (I
OK
) ±20 mA
DC Output Current (I
OUT
) ±25 mA
DC V
CC
/GND Current (ICC) ±75 mA
Storage Temperature (T
STG
) −65°C to +150°C
Lead Temperature (T
L
)
(Soldering, 10 seconds) 260°C
Supply Voltage (V
CC
) 2.0V to 5.5V
Input Voltage (V
IN
)0V to +5.5V
Output Voltage (V
OUT
)0V to V
CC
Operating Temperature (T
OPR
) −40°C to +85°C
Input Rise and Fall Time (t
r
, tf)
V
CC
= 3.3V ± 0.3V 0 ns/V ∼ 100 ns/V
V
CC
= 5.0V ± 0.5V 0 ns/V ∼ 20 ns/V
Symbol Parameter
V
CC
(V)
TA = 25°CT
A
= −40°C to +85°C
Units Conditions
Min Typ Max Min Max
V
IH
HIGH Level Input 2.0 1.50 1.50
V
Voltage 3.0− 5.5 0.7 V
CC
0.7 V
CC
V
IL
LOW Level Input 2.0 0.50 0.50
V
Voltage 3.0 − 5.5 0.3 V
CC
0.3 V
CC
V
OH
HIGH Level Output 2.0 1.9 2.0 1.9 VIN = VIHIOH = −50 µA
Voltage 3.0 2.9 3.0 2.9 V or V
IL
4.5 4.4 4.5 4.4
3.0 2.58 2.48
V
IOH = −4 mA
4.5 3.94 3.80 IOH = −8 mA
V
OL
LOW Level Output 2.0 0.0 0.1 0.1 VIN = VIHIOL = 50 µA
Voltage 3.0 0.0 0.1 0.1 V or V
IL
4.5 0.0 0.1 0.1
3.0 0.36 0.44
V
IOL = 4 mA
4.5 0.36 0.44 IOL = 8 mA
I
IN
Input Leakage 0 − 5.5 ±0.1 ±1.0
µA
VIN = 5.5V or GND
Current
I
CC
Quiescent Supply 5.5 4.0 40.0
µA
VIN = VCC or GND
Current
Symbol Parameter
V
CC
(V)
TA = 25°C
Units Conditions
Typ Limits
V
OLP
Quiet Output Maximum 5.0 0.5 0.8 V CL = 50 pF
(Note 3) Dynamic V
OL
V
OLV
Quiet Output Minimum 5.0 −0.5 0.8 V CL = 50 pF
(Note 3) Dynamic V
OL
V
IHD
Minimum HIGH Level 5.0 3.5 V CL = 50 pF
(Note 3) Dynamic Input Voltage
V
ILD
Maximum LOW Level 5.0 1.5 V CL = 50 pF
(Note 3) Dynamic Input Voltage
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