Fairchild Semiconductor 74VHC125SJX, 74VHC125SJ, 74VHC125N, 74VHC125MX, 74VHC125MTCX Datasheet
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August 1993
Revised March 1999
74VHC125 Quad Buffer with 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS011632.prf www.fairchildsemi.com
74VHC125
Quad Buffer with 3-STATE Outputs
General Description
The VHC125 contains fo ur indep enden t non-i nvertin g buffers with 3-STATE outputs. It is an ad vanced high-speed
CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without re gard to the supply voltage. This device can be used to interface 5V to 3V systems
and two supply systems such as b attery backup. This cir-
cuit prevents device d estr uct i on due to m isma tche d s upp l y
and input voltages.
Features
■ High Speed: tPD = 3.8 ns (typ) at VCC = 5V
■ Lower power dissipation: I
CC
= 4 µA (max) at TA= 25°C
■ High noise immunity: V
NIH
= V
NIL
= 28% VCC (min)
■ Power down protection is provided on all inputs
■ Low noise: V
OLP
= 0.8V (max)
Ordering Code:
Surface mount pack ages are also available on Tape and Reel. Specify by appending the s uffix let te r “X” to the ordering code .
Logic Symbol
IEEE/IEC
Pin Descriptions
Connection Diagram
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
Z = HIGH Impedance
X = Immaterial
Order Number Package Number Package Description
74VHC125M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74VHC125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC125N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A
n
, B
n
Inputs
O
n
Outputs
Inputs Output
A
n
B
n
O
n
LL L
LH H
HX Z
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74VHC125
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: Absolute Maximum Ratings are values beyond which the device
may be damaged or ha ve its useful li fe impaire d. The datab ook specifications should be met, without exception, to ensure that the system design is
reliable over its p ower supp ly, temperature, and ou tput/input loading variables. Fairchild does not recom mend operation outside databook specifications.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
Note 3: Paramete r guaranteed by desig n.
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Voltage (V
IN
) −0.5V to +7.0V
DC Output Voltage (V
OUT
) −0.5V to VCC + 0.5V
Input Diode Current (I
IK
) −20 mA
Output Diode Current (I
OK
) ±20 mA
DC Output Current (I
OUT
) ±25 mA
DC V
CC
/GND Current (ICC) ±50 mA
Storage Temperature (T
STG
) −65°C to +150°C
Lead Temperature (T
L
)
(Soldering, 10 seconds) 260°C
Supply Voltage (V
CC
) 2.0V to +5.5V
Input Voltage (V
IN
)0V to +5.5V
Output Voltage (V
OUT
) 0V to V
CC
Operating Te mperature (T
OPR
) −40°C to +85°C
Input Rise and Fall Time (t
r
, tf)
V
CC
= 3.3V ± 0.3V 0 ∼ 100 ns/V
V
CC
= 5.0V ± 0.5V 0 ∼ 20 ns/V
Symbol Parameter
V
CC
(V)
TA = 25°CT
A
= −40°C to +85°C
Units Conditions
Min Typ Max Min Max
V
IH
HIGH Level Input 2.0 1.50 1.50
V
Voltage 3.0 − 5.5 0.7 V
CC
0.7 V
CC
V
IL
LOW Level Input 2.0 0.50 0.50
V
Voltage 3.0 − 5.5 0.3 V
CC
0.3 V
CC
V
OH
HIGH Level Output 2.0 1.9 2.0 1.9 VIN = VIHIOH = −50 µA
Voltage 3.0 2.9 3.0 2.9 V or V
IL
4.5 4.4 4.5 4.4
3.0 2.58 2.48
V
IOH = −4 mA
4.5 3.94 3.80 IOH = −8 mA
V
OL
LOW Level Output 2.0 0.0 0.1 0.1 VIN = VIHIOL = 50 µA
Voltage 3.0 0.0 0.1 0.1 V or V
IL
4.5 0.0 0.1 0.1
3.0 0.36 0.44
V
IOL = 4 mA
4.5 0.36 0.44 IOL = 8 mA
I
OZ
3-STATE Output 5.5 ±0.25 ±2.5 µAVIN = VIH or V
IL
Off-State Current V
OUT
= VCC or GND
I
IN
Input Leakage 0 − 5.5 ±0.1 ±1.0 µAVIN = 5.5V or GND
Current
I
CC
Quiescent Supply 5.5 4.0 40.0 µAVIN = VCC or GND
Current
Symbol Parameter
V
CC
(V)
TA = 25°C
Units Conditions
Typ Limits
V
OLP
Quiet Output Maximum 5.0 0.5 0.8 V CL = 50 pF
(Note 3) Dynamic V
OL
V
OLV
Quiet Output Minimum 5.0 −0.5 −0.8 V CL = 50 pF
(Note 3) Dynamic V
OL
V
IHD
Minimum HIGH Level 5.0 3.5 V CL = 50 pF
(Note 3) Dynamic Input Voltage
V
ILD
Maximum HIGH Level 5.0 1.5 V CL = 50 pF
(Note 3) Dynamic Input Voltage
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