Fairchild Semiconductor 74VCXR162601MTX, 74VCXR162601MTD Datasheet
August 1998
Revised April 1999
74VCXR162601 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26Ω
Series Resistors in the Outputs
© 1999 Fairchild Semiconductor Corporation DS500171.prf www.fairchildsemi.com
74VCXR162601
Low Voltage 18-Bit Universal Bus Transceivers with 3.6V
Tolerant Inputs and Outputs and 26 Ω Series Resistors in
the Outputs
General Description
The VCXR162601, 18-b it universal bus transceiver, combines D-type latches and D-type flip-flops to allow data flow
in transparent, latched, and clocked modes.
Data flow in each dir ection is controlled by o utput-enable
(OEAB
and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB
and CLKENBA)
inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-toLOW logic level. If LEAB is LOW, the A bus data is s tored
in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. Output-enable OEAB
is active-LOW. When OEAB
is HIGH, the outputs are in the high-imp edance state.
Data flow for B to A is similar to tha t of A to B but uses
OEBA
, LEBA, CLKBA and CLKENBA.
The 74VCXR162601 i s designe d for lo w voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The VCXR162601 i s also desi gned with 26Ω series resistors on both the A and B Port outputs. This design reduces
line noise in applications such as memor y addre ss drivers,
clock drivers, and bus transceivers/transmitters.
Features
■ 1.65–3.6V VCC supply operation
■ 3.6V tolerant inputs and outputs
■ 26Ω series resistors on both the A and B Port outputs.
■ t
PD
(A to B, B to A)
3.8 ns max for 3.0V to 3.6V V
CC
4.6 ns max for 2.3V to 2.7V V
CC
9.2 ns max for 1.65V to 1.95V V
CC
■ Power-down HIGH impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ Static Drive (I
OH/IOL
)
±12 mA @ 3.0V V
CC
±8 mA @ 2.3V V
CC
±3 mA @ 1.65V V
CC
■ Uses patented noise/EMI reduction circuitry
■ Latchup performance exceeds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model >200V
Note 1: To ensure the high-impedance state d uring power up or power
down, OE
should be tied to VCC through a pull-up r esistor; the min imum
value of the res istor is d eter mine d by the cu rre nt-sou rcin g ca pa bility of t he
driver.
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Order Number Package Number Package Description
74VCXR162601MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
www.fairchildsemi.com 2
74VCXR162601
Connection Diagram Pin Descriptions
Function Table
(Note 2)
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = HIGH Impedance
Note 2: A-to-B data flow is shown; B-to-A flow is si milar but uses OE BA
,
LEBA, CLKBA, and C LKENBA
.
Note 3: Output level before the indicated steady-state inp ut conditions
were established
Note 4: Output level before the indicated steady-state inp ut conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Logic Diagram
Pin Names Description
OEAB
, OEBA Output Enable Inputs (Active LOW)
LEAB, LEBA Latch Enable Inputs
CLKAB, CLKBA Clock Inputs
CLKENAB
, CLKENBA Clock Enable Inputs
A
1–A18
Side A Inputs or 3-STATE Outputs
B
1–B18
Side B Inputs or 3-STATE Outputs
Inputs Outputs
CLKENAB
OEAB LEAB CLKAB A
n
B
n
XHXXXZ
XLHXLL
XLHXHH
HLLXXB
0
(Note 3)
HLLXXB
0
(Note 3)
LLL↑ LL
LLL↑ HH
LLLLXB
0
(Note 3)
LLLHXB
0
(Note 4)
3 www.fairchildsemi.com
74VCXR162601
Absolute Maximum Ratings(Note 5) Recommended Operating
Conditions
(Note 7)
Note 5: The “Absolute Maximum Ratings ” are those val ues beyond w hich
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The Recommended Operating Con ditions tables will define th e c onditions for actual device operation.
Note 6: I
O
Absolute Maximum Rating must be observed.
Note 7: Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.
DC Electrical Characteristics (2.7V < VCC ≤ 3.6V)
Note 8: Outputs disab led or 3-STATE only.
Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V
I
) −0.5V to +4.6V
Output Voltage (V
O
)
Outputs 3-STATE −0.5V to +4.6V
Outputs Active (Note 6) −0.5 to V
CC
+ 0.5V
DC Input Diode Current (I
IK
) VI < 0V −50 mA
DC Output Diode Current (I
OK
)
V
O
< 0V −50 mA
V
O
> V
CC
+50 mA
DC Output Source/Sink Current
(I
OH/IOL
) ±50 mA
DC V
CC
or Ground Current per
Supply Pin (I
CC
or Ground) ±100 mA
Storage Temperature Range (T
STG
) −65°C to +150°C
Power Supply
Operating 1.65V to 3.6V
Data Retention Only 1.2V to 3.6V
Input Voltage −0.3V to 3.6V
Output Voltage (V
O
)
Output in Active States 0V to V
CC
Output in 3-STATE 0.0V to 3.6V
Output Current in I
OH/IOL
V
CC
= 3.0V to 3.6V ±12 mA
V
CC
= 2.3V to 2.7V ±8 mA
V
CC
=1.65V to 2.3V ±3 mA
Free Air Operating Temperature (T
A
) −40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
V
IN
= 0.8V to 2.0V, VCC = 3.0V 10 ns/V
Symbol Parameter Conditions
V
CC
Min Max Units
(V)
V
IH
HIGH Level Input Voltage 2.7–3.6 2.0 V
V
IL
LOW Level Input Voltage 2.7–3.6 0.8 V
V
OH
HIGH Level Output Voltage IOH = −100 µA 2.7–3.6 VCC − 0.2
IOH = −6 mA 2.7 2.2 V
IOH = −8 mA 3.0 2.4
IOH = −12 mA 3.0 2.2
V
OL
LOW Level Output Voltage IOL = 100 µA 2.7–3.6 0.2
IOL = 6 mA 2.7 0.4 V
IOL = 8 mA 3.0 0.55
IOL = 12 mA 3.0 0.8
I
I
Input Leakage Current 0V ≤ VI ≤ 3.6V 2.7–3.6 ±5.0 µA
I
OZ
3-STATE Output Leakage 0V ≤ VO ≤ 3.6V 2.7–3.6 ±10 µA
VI = VIH or V
IL
I
OFF
Power Off Leakage Current 0V ≤ (VI, VO) ≤ 3.6V 0 10 µA
I
CC
Quiescent Supply Current VI = VCC or GND 2.7–3.6 20
µA
VCC ≤ (VI, VO) ≤ 3.6V (Note 8) 2.7–3.6 ±20
∆I
CC
Increase in ICC per Input VIH = VCC − 0.6V 2.7–3.6 750 µA
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