Fairchild Semiconductor 74VCXH16373MTDX, 74VCXH16373MTD Datasheet

© 2000 Fairchild Semiconductor Corporation DS500229 www.fairchildsemi.com

January 2000
Revised March 2000

74VCXH16373 Low Voltage 16-Bit Transparent Latch with Bushold

74VCXH16373
Low Voltage 16-Bit Transparent Latch with Bushold

General Description

The VCXH16373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear to be transparent to the data when the Latch enable
(LE) is HIGH. When LE is LOW, the data that meet s the
setup time is latched. Data appea rs on the bus when the
Output Enable (OE

) is LOW. When OE is HIGH, the out-

puts are in a high impedance state.
The VCXH16373 data inputs include active bushold cir-

cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.

The 74VCXH16373 is designed for low voltage (1.65V to

3.6V) V

CC

applications with output compatibility up to 3.6V.

The 74VCXH16373 i s fabric ated with an advanc ed CMOS
technology to achieve high speed operation while maintain­ing low CMOS power dissipation.

Features

■ 1.65V–3.6V VCC supply operation

■ 3.6V tolerant control inputs and outputs

■ Bushold on data inputs eliminates the need for external

pull-up/pull-down resistors

■ t

PD

(In to On)

3.0 ns max for 3.0V to 3.6V V

CC

3.4 ns max for 2.3V to 2.7V V

CC

6.8 ns max for 1.65V to 1.95V V

CC

■ Static Drive (IOH/IOL)

±24 mA @ 3.0V V

CC

±18 mA @ 2.3V V

CC

±6 mA @ 1.65V V

CC

■ Uses patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V
Machine model > 200V

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending su ffix let te r “X” to the ordering code.

Logic Symbol Pin Descriptions

Ordering Number

Package

Package Description

Number

74VCXH16373MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names Description

OE

n

Output Enable Input (Active LOW)

LE

n

Latch Enable Input

I

0–I15

Bushold Inputs

O

0–O15

Outputs

www.fairchildsemi.com 2

74VCXH16373

Connection Diagram Tr uth Tables

H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIG H or LOW, control inputs may not float )
Z = High Impedance
O

0

= Previous O0 before HIGH-to-LOW of Latch Enable

Functional Description

The 74VCXH16373 conta ins sixteen edge D-type latches
with 3-STAT E outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. Control pins can be shorted together to obtai n full
16-bit operation. The following description applies to each
byte. When the Latch E nable (LE

n

) input is HIGH, data on

the I

n

enters the latches. In this conditio n the latches are

transparent, i.e., a latc h output will chang e state ea ch time

its I input changes. When LE

n

is LOW, the latches store

information that was pr esent on the I inputs a set up time
preceding the HIGH-to-LOW transition on LE

n

. The 3-

STATE outputs are controlled by the Output Enable (OE

n

)

input. When OE

n

is LOW the standard outputs are in the 2-

state mode. When OE

n

is HIGH, the standard outputs a re

in the high impedance mode but this does not interfere with
entering new data into the latches.

Logic Diagram

Please note that this diagram is provided o nly f or t he understanding of lo gic operations and should not be used to estimate propagation delays.

Inputs Outputs

LE

1

OE

1

I0–I

7

O0–O

7

XHXZ
HLL L
HLHH

LLXO

0

Inputs Outputs

LE

2

OE

2

I8–I

15

O8–O

15

XHXZ
HLL L
HLHH

LLXO

0

3 www.fairchildsemi.com

74VCXH16373

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

(Note 3)

Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-

ings. The “Recommended Operating Conditions” table will define the condi­tions for actual device operation.

Note 2: I

O

Absolute Maximum Rating must be observed.

Note 3: Floating or unused inputs m us t be held HIGH or LOW.

DC Electrical Characteristics (2.7V < VCC ≤ 3.6V)

Note 4: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 5: An external dri ve r m us t s ink at least the specified cur rent to switch from HIGH -t o-LOW.
Note 6: Outputs disab led or 3-STATE only.

Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V

I

)

OE

n

, LE

n

−0.5V to 4.6V

I

0

– I

15

−0.5V to VCC + 0.5V

Output Voltage (V

O

)
Outputs 3-STATED −0.5V to +4.6V
Outputs Active (Note 2) −0.5V to V

CC

+0.5V

DC Input Diode Current (I

IK

)

V

I

< 0V −50 mA

DC Output Diode Current (I

OK

)

V

O

< 0V −50 mA

V

O

> V

CC

+50 mA

DC Output Source/Sink Current

(I

OH/IOL

) ±50 mA

DC V

CC

or GND Current per

Supply Pin (I

CC

or GND) ±100 mA

Storage Temperature Range (T

STG

) −65°C to +150°C

Power Supply

Operating 1.65V to 3.6V
Data Retention Only 1.2V to 3.6V

Input Voltage −0.3V to V

CC

Output Voltage (VO)

Output in Active States 0V to V

CC

Output in “OFF” State 0.0V to 3.6V

Output Current in I

OH/IOL

VCC = 3.0V to 3.6V ±24 mA
V

CC

= 2.3V to 2.7V ±18 mA

V

CC

= 1.65V to 2.3V ±6 mA

Free Air Operating Temperature (T

A

) −40°C to +85°C

Minimum Input Edge Rate (∆t/∆V)

V

IN

= 0.8V to 2.0V, VCC = 3.0V 10 ns/V

Symbol Parameter Conditions

V

CC

(V)

Min Max Units

V

IH

HIGH Level Input Voltage 2.7–3.6 2.0 V

V

IL

LOW Level Input Voltage 2.7–3.6 0.8 V

V

OH

HIGH Level Output Voltage IOH = −100 µA 2.7–3.6 VCC − 0.2 V

IOH = −12 mA 2.7 2.2 V
IOH = −18 mA 3.0 2.4 V
IOH = −24 mA 3.0 2.2 V

V

OL

LOW Level Output Voltage IOL = 100 µA 2.7–3.6 0.2 V

IOL = 12 mA 2.7 0.4 V
IOL = 18 mA 3.0 0.4 V
IOL = 24 mA 3.0 0.55 V

I

I

Input Leakage Current Control Pins 0 ≤ VI ≤ 3.6V 2.7–3.6 ±5.0 µA

Data Pins VI = VCC or GND 2.7–3.6 ±5.0 µA

I

I(HOLD)

Bushold Input Minimum VIN = 0.8V 3.0 75

µA

Drive Hold Current VIN = 2.0V 3.0 −75

I

I(OD)

Bushold Input Over-Drive (Note 4) 3.6 450

µA

Current to Change State (Note 5) 3.6 −450

I

OZ

3-STATE Output Leakage 0 ≤ VO ≤ 3.6V

2.7–3.6 ±10 µA

VI = VIH or V

IL

I

OFF

Power-OFF Leakage Current 0 ≤ (VO) ≤ 3.6V 0 10 µA

I

CC

Quiescent Supply Current VI = VCC or GND 2.7–3.6 20 µA

VCC ≤ (VO) ≤ 3.6V (Note 6) 2.7–3.6 ±20 µA

∆I

CC

Increase in ICC per Input VIH = VCC −0.6V 2.7–3.6 750 µA