January 2000
Revised March 2000
74VCXH162240
Low Voltage 16-Bit Inverting Buffer/Line Driver
with Bushold and 26Ω Series Resistors in Outputs
74VCXH162240 Low Voltage 16-Bit Inverting Buffer/Line Driver
General Description
The VCXH162240 contains sixteen inverting buffers with 3STATE outputs to be em ployed as a m emory an d address
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The VCXH162240 data inputs include activ e bushold circuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74VCXH162240 is also designed with 26Ω series
resistors in the outputs. This design reduce s line noise in
applications such as memory address drivers, cl ock drivers, and bus transceivers/transmitters.
The 74VCXH16224 0 is desig ned for lo w voltage (1.65V to
3.6V) V
The 74VCXH162240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining low CMOS power dissipation.
applications with output capability up to 3.6V.
CC
Features
■ 1.65V–3.6V VCC supply operation
■ 3.6V tolerant control inputs and outputs
■ Bushold on data inputs elimin atin g the nee d for externa l
pull-up/pull-down resistors
■ 26Ω series resistors in outputs
■ t
PD
3.3 ns max for 3.0V to 3.6V V
3.8 ns max for 2.3V to 2.7V VCC
7.6 ns max for 1.65V to 1.95V V
■ Static Drive (IOH/IOL)
±12 mA @ 3.0V V
±8 mA @ 2.3V V
±3 mA @ 1.65V V
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exce eds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
CC
CC
CC
CC
CC
Ordering Code:
Order Number
74VCXH162240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JECED MO-153, 6.1mm Wide
74VCXH162240MTX
(Note 1)
Note 1: Use this Order Nu m ber to receive devices in Tape and Reel.
Package
Number
[TUBES]
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JECED MO-153, 6.1mm Wide
[TAPE a nd REEL]
Package Descript ion s
Logic Symbol Pin Descriptions
Pin Names Description
OE
n
I
0–I15
O
0–O15
© 2000 Fairchild Semiconductor Corporation DS500233 www.fairchildsemi.com
Output Enable Input (Active LOW)
Bushold Inputs
Outputs
Connection Diagram Truth Tables
OE
LL H
74VCXH162240
LH L
HX Z
OE
LL H
LH L
HX Z
OE
LL H
LH L
HX Z
OE
LL H
LH L
HX Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
Inputs Outputs
1
I0–I
3
Inputs Outputs
2
I4–I
7
Inputs Outputs
3
I8–I
11
Inputs Outputs
4
I12–I
15
O0–O
O4–O
O8–O
O12–O
3
7
11
15
Functional Description
The 74VCXH162240 contains sixteen inverting buffers with
3-STATE outputs. The device is nibble (4 bits) controlled
with each nibble funct ioning ide ntically, but independent of
each other. The control pins may be shor ted together to
obtain full 16-bit ope ration.The 3-STATE outputs are con -
Logic Diagram
www.fairchildsemi.com 2
trolled by an Output Enable (OE
LOW, the outputs are in the 2-state mode. When OE
) input. When OEn is
n
is
n
HIGH, the standard outputs are in the high impedance
mode but this does not interfere with entering new data into
the inputs.
Absolute Maximum Ratings(Note 2) Recommended Operating
Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V
OE
n
– I
I
0
15
Output Voltage (V
)
I
−0.5V to 4.6V
−0.5V to VCC + 0.5V
)
O
Outputs 3-STATED −0.5V to +4.6V
Outputs Active (Note 3) −0.5V to V
DC Input Diode Current (I
< 0V −50 mA
V
I
DC Output Diode Current (I
< 0V −50 mA
V
O
> V
V
O
CC
)
IK
)
OK
+0.5V
CC
+50 mA
DC Output Source/Sink Current
) ±50 mA
(I
OH/IOL
or GND Current per
DC V
CC
Supply Pin (I
Storage Temperature Range (T
or GND) ±100 mA
CC
) −65°C to +150°C
STG
Conditions
Power Supply
Operating 1.65V to 3.6V
Data Retention Only 1.2V to 3.6V
Input Voltage −0.3V to V
Output Voltage (VO)
Output in Active States 0V to V
Output in 3-STATE 0.0V to 3.6V
Output Current in I
VCC = 3.0V to 3.6V ±12 mA
= 2.3V to 2.7V ±8 mA
V
CC
= 1.65V to 2.3V ±3 mA
V
CC
Free Air Operating Temperature (T
Minimum Input Edge Rate (∆t/∆V)
= 0.8V to 2.0V, VCC = 3.0V 10 ns/V
V
IN
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Absolute Maximum Rating must be observed.
Note 3: I
O
Note 4: Floating or unused control inputs must be held HIG H or LOW.
(Note 4)
OH/IOL
) −40°C to +85°C
A
DC Electrical Characteristics (2.7V < VCC ≤ 3.6V)
V
Symbol Parameter Conditions
V
IH
V
IL
V
OH
V
OL
I
I
I
I(HOLD)
I
I(OD)
I
OZ
I
OFF
I
CC
∆I
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6: An external dri ve r m us t s ink at least the specified cur rent to switch from HIGH -t o-LOW.
Note 7: Outputs disab led or 3-STATE only.
HIGH Level Input Voltage 2.7 − 3.6 2.0 V
LOW Level Input Voltage 2.7 − 3.6 0.8 V
HIGH Level Output Voltage IOH = −100 µA2.7 − 3.6 VCC − 0.2 V
LOW Level Output Voltage IOL = 100 µA2.7 − 3.6 0.2 V
Input Leakage Current Control Pins 0 ≤ VI ≤ 3.6V 2.7 − 3.6 ±5.0 µA
Bushold Input Minimum VIN = 0.8V 3.0 7 5
Drive Hold Current VIN = 2.0V 3.0 −75
Bushold Input Over-Drive (Note 5) 3.6 450
Current to Change State (Note 6) 3.6 −450
3-STATE Output Leakage 0 ≤ VO ≤ 3.6V
Power-OFF Leakage Current 0 ≤ (VO) ≤ 3.6V 0 10 µA
Quiescent Supply Current VI = VCC or GND 2.7 − 3.6 20 µA
Increase in ICC per Input VIH = VCC −0.6V 2.7 − 3.6 750 µA
CC
Data Pins VI = VCC or GND 2.7 − 3.6 ±5.0 µA
IOH = −6 mA 2.7 2.2 V
IOH = −8 mA 3.0 2.4 V
IOH = −12 mA 3.0 2.2 V
IOL = 6 mA 2.7 0.4 V
IOL = 8 mA 3.0 0.55 V
IOL = 12 mA 3.0 0.80 V
VI = VIH or V
VCC ≤ (VO) ≤ 3.6V (Note 7) 2.7 − 3.6 ±20 µA
IL
CC
(V)
2.7 − 3.6 ±10 µA
Min Max Units
74VCXH162240
CC
CC
µA
µA
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