October 1999
Revised April 2000
74VCXF162835
Low Voltage 18-Bit Universal Bus Driver with 3.6V
Tolerant Outputs and 26Ω Series Resistors in Outputs
74VCXF162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in
Outputs
General Description
The VCXF162835 low vo ltage 18-bit universal bus driver
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched and clocked modes.
Data flow is controll ed b y ou tpu t-enable (OE
(LE), and clock (CLK) inputs. The device operates in
Transparent Mode when LE is held HIGH. The device
operates in clocked mode when LE is LOW and CLK is toggled. Data transfer s f rom the In pu ts (I
a Positive Edge Transition of the Clock. When OE
the output data is enabl ed. When OE
port is in a high impedance state.
The VCXF162835 i s designe d with 2 6Ω series resistors in
the outputs. This design reduces noise in applications such
as memory address drivers, clo ck drivers, and bus transceivers/transmitters.
The 74VCXF162835 is designed for low voltage ( 1.65V to
3.6V) V
The 74VCXF162835 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining low CMOS power dissipation.
applications with I/O capability up to 3.6V.
CC
), latch-enable
) to Outputs (On) on
n
is HIGH the output
is LOW,
Features
■ Compatible with PC133 DIMM module specifications
■ 1.65V–3.6V V
■ 3.6V tolerant outputs
■ 26Ω series resistors in outputs
■ t
(CP to On)
PD
3.2 ns max for 3.0V to 3.6V V
4.1 ns max for 2.3V to 2.7V V
7.4 ns max for 1.65V to 1.95V V
■ Power-down high impedance outputs
■ Static Drive (I
±12 mA @ 3.0V V
±8 mA @ 2.3V V
±3 mA @ 1.65V V
■ Latchup performance exceeds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model >200V
specifications provided
CC
)
OH/IOL
CC
CC
CC
CC
CC
CC
Ordering Code:
Order Number
74VCXF162835MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74VCXF162835MTX
(Note 1)
Note 1: Use this Order Number to receive devices in Tape and Reel.
Package
Number
[TUBES]
MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Package Description
© 2000 Fairchild Semiconductor Corporation DS500259 www.fairchildsemi.com
Connection Diagram Pin Descriptions
Pin Names Descriptio n
OE
LE Latch Enable Input
CP Clock Input
I
74VCXF162835
- I
1
18
- O
O
1
18
Function Table
LE CP
OE
HXXX Z
LHXL L
LHXH H
LL↑ LL
LL↑ HH
LLHXO
LLLXO
H = HIGH Voltage Level
L = LOW Level Voltage
X = Immaterial (HIGH or LOW, Inputs may not float)
Z = High Impedance
Note 2: Output level be fore the indicated steady-s tate input conditions
were established provided that CP was H I GH before LE went LO W.
Note 3: Output level be fore the indicated steady-s tate input conditions
were established.
Output Enable Input (Active LOW)
Data Inputs
3-STATE Outputs
Inputs Outputs
I
n
O
n
(Note 2)
0
(Note 3)
0
Logic Diagram
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Absolute Maximum Ratings(Note 4) Recommended Operating
Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V
Output Voltage (V
) −0.5V to VCC + 0.5V
I
)
O
Outputs 3-STATE −0.5V to +4.6V
Outputs Active (Note 5) −0.5 to V
DC Input Diode Current (I
< −0.5V −50 mA
V
I
V
> VCC + 0.5V (Note 6) +50 mA
I
DC Output Diode Current (I
< 0V −50 mA
V
O
V
> V
O
CC
)
IK
)
OK
+ 0.5V
CC
+50 mA
DC Output Source/Sink Current
(I
) ±50 mA
OH/IOL
DC V
or Ground Current per
CC
Supply Pin (I
Storage Temperature Range (T
or Ground) ±100 mA
CC
) −65°C to +150°C
STG
Conditions
Power Supply
Operating 1.65V to 3.6V
Data Retention Only 1.2V to 3.6V
Input Voltage −0.3V to V
Output Voltage (VO)
Output in Active States 0V to V
Output in 3-STATE 0.0V to 3.6V
Output Current in I
V
= 3.0V to 3.6V ±12 mA
CC
= 2.3V to 2.7V ±8 mA
V
CC
V
= 1.65V to 2.3V ±3 mA
CC
Free Air Operating Temperature (T
Minimum Input Edge Rate (∆t/∆V)
= 0.8V to 2.0V, VCC = 3.0V 10 ns/V
V
IN
Note 4: The “Absolute Maximum Ratings” are those value s beyond which
the safety of the d evice cannot b e guaranteed . The device sh ould not be
operated at these limit s. The parametric values defi ned in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The Recommended Operating C onditions tables will define the conditions for actual device opera t i on.
Absolute Maximum Rating must be observed.
Note 5: I
O
Note 6: Inputs do not have ov er-voltage tolerance.
Note 7: Floating or unused pin (inputs or I/O's) must be held H I GH or LOW.
(Note 7)
OH/IOL
) −40°C to +85°C
A
74VCXF162835
CC
CC
DC Electrical Characteristics (2.7V < V
Symbol Parameter Conditions
V
IH
V
IL
V
OH
V
OL
I
I
I
OZ
I
OFF
I
CC
∆I
Note 8: Outputs disabled or 3-STATE only.
HIGH Level Input Voltage 2.7–3.6 2.0 V
LOW Level Input Voltage 2.7–3.6 0.8 V
HIGH Level Output Voltage IOH = −100 µA2.7–3.6 VCC − 0.2
LOW Level Output Voltage IOL = 100 µA2.7–3.6 0.2
Input Leakage Current VI = VCC or GND 2.7–3.6 ±5.0 µA
3-STATE Output Leakage 0V ≤ VO ≤ 3.6V
Power Off Leakage Current 0V ≤ (VO) ≤ 3.6V 0 10 µA
Quiescent Supply Current VI = VCC or GND 2.7–3.6 20
Increase in ICC per Input VIH = VCC − 0.6V 2.7–3.6 750 µA
CC
I
= −6 mA 2.7 2.2
OH
= −8 mA 3.0 2.4
I
OH
IOH = −12 mA 3.0 2.2
= 6mA 2.7 0.4
I
OL
IOL = 8 mA 3.0 0.55
IOL = 12mA 3.0 0.8
VI = VIH or V
VCC ≤ (VO) ≤ 3.6V (Note 8) 2.7–3.6 ±20
CC
IL
≤ 3.6V)
V
CC
(V)
2.7–3.6 ±10 µA
Min Max Units
V
V
µA
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