Fairchild Semiconductor 74VCX162601MTDX, 74VCX162601MTD Datasheet

April 1998
Revised April 1999

74VCX162601 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26Ω

Series Resistors in the B-Port Outputs

© 1999 Fairchild Semiconductor Corporation DS500150.prf www.fairchildsemi.com

74VCX162601
Low Voltage 18-Bit Universal Bus Transceivers with 3.6V

Tolerant Inputs and Outputs and 26 Ω Series Resistors in
the B-Port Outputs

General Description

The VCX162601, 18-bit universal bus transceiver, com­bines D-type latches and D-type flip-flops to allow data flow
in transparent, latched, and clocked modes.

Data flow in each dir ection is controlled by o utput-enable
(OEAB

and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. The clock can be con­trolled by the clock-enable (CLKENAB

and CLKENBA)
inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-to­LOW logic level. If LEAB is LOW, the A bus data is s tored
in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. Output-enable OEAB

is active-LOW. When OEAB

is HIGH, the outputs are in the HIGH-impedance state.
Data flow for B to A is similar to tha t of A to B but uses

OEBA

, LEBA, CLKBA and CLKENBA.

The 74VCX162601 is designed for low v oltage (1.65V to

3.6V) V

CC

applications with I/O compatibility up to 3.6V.

The VCX162601 is also designed with 26Ω series resistors
in the B-Port outputs. This design reduces line noise in
applications such as memory address drivers, clo ck driv­ers, and bus transceivers/transmitters.

Features

■ 1.65V–3.6V VCC supply operation

■ 3.6V tolerant inputs and outputs

■ 26Ω series resistors in B-Port outputs

■ t

PD

(A to B)

3.8 ns max for 3.0V to 3.6V V

CC

4.6 ns max for 2.3V to 2.7V V

CC

9.2 ns max for 1.65V to 1.95V V

CC

■ Power-down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■ Static Drive (I

OH/IOL

B outputs)

±12 mA @ 3.0V V

CC

±8 mA @ 2.3V V

CC

±3 mA @ 1.65V V

CC

■ Uses patented noise/EMI reduction circuitry

■ Latchup performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V
Machine model >200V

Note 1: To ensure the high-impedance state d uring power up or power
down, OE

should be tied to VCC through a pull-up r esistor; the min imum

value of the res istor is d eter mine d by the cu rre nt-sou rcin g ca pa bility of t he
driver.

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Pin Descriptions

Order Number Package Number Package Description

74VCX162601MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names Description

OEAB

, OEBA Output Enable Inputs (Active LOW)
LEAB, LEBA Latch Enable Inputs
CLKAB, CLKBA Clock Inputs
CLKENAB

, CLKENBA Clock Enable Inputs

A

1–A18

Side A Inputs or 3-STATE Outputs

B

1–B18

Side B Inputs or 3-STATE Outputs

www.fairchildsemi.com 2

74VCX162601

Connection Diagram Function Table (Note 2)

H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance

Note 2: A-to-B data flow i s show n; B- to-A flo w is similar but uses OEBA

,

LEBA, CLKBA, and C LKENBA

.

Note 3: Output level before th e indicated steady-state input conditions
were established.

Note 4: Output level before the indicated steady-state inp ut conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.

Logic Diagram

Inputs Outputs

CLKENAB

OEAB LEAB CLKAB A

n

B

n

XHXXXZ
XLHXLL
XLHXHH
HLLXXB

0

(Note 3)

HLLXXB

0

(Note 3)
LLL↑ LL
LLL↑ HH
LLLLXB

0

(Note 3)
LLLHXB

0

(Note 4)

3 www.fairchildsemi.com

74VCX162601

Absolute Maximum Ratings(Note 5)

Recommended Operating
Conditions

(Note 7)

Note 5: The “Absolute Maximum Ratings ” are those val ues beyond w hich
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat­ings. The Recommended Operating Con ditions tables will define th e c ondi­tions for actual device operation.

Note 6: I

O

Absolute Maximum Rating must be observed.

Note 7: Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.

DC Electrical Characteristics (2.7V < VCC ≤ 3.6V)

Note 8: Outputs disab led or 3-STATE only.

Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V

I

) −0.5V to +4.6V

Output Voltage (V

O

)
Outputs 3-State −0.5V to +4.6V
Outputs Active (Note 6) −0.5 to V

CC

+ 0.5V

DC Input Diode Current (I

IK

) VI < 0V −50 mA

DC Output Diode Current (I

OK

)

V

O

< 0V −50 mA

V

O

> V

CC

+50 mA

DC Output Source/Sink Current

(I

OH/IOL

) ±50 mA

DC V

CC

or Ground Current per

Supply Pin (I

CC

or Ground) ±100 mA

Storage Temperature Range (T

STG

) −65°C to +150°C

Power Supply

Operating 1.65V to 3.6V
Data Retention Only 1.2V to 3.6V

Input Voltage −0.3V to 3.6V
Output Voltage (V

O

)

Output in Active States 0V to V

CC

Output in 3-STATE 0.0V to 3.6V

Output Current in I

OH/IOL

B Outputs

V

CC

= 3.0V to 3.6V ±12 mA

V

CC

= 2.3V to 2.7V ±8 mA

V

CC

= 1.65V to 1.95V ±3 mA

Output Current in ±I

OH/IOL

A Outputs

V

CC

= 3.0V to 3.6V ±24 mA

V

CC

= 2.3V to 2.7V ±18 mA

V

CC

= 1.65V to 2.3V ±6 mA

Free Air Operating Temperature (T

A

) −40°C to +85°C

Minimum Input Edge Rate (∆t/∆V)

V

IN

= 0.8V to 2.0V, VCC = 3.0V 10 ns/V

Symbol Parameter Conditions

V

CC

Min Max Units

(V)

V

IH

HIGH Level Input Voltage 2.7 − 3.6 2.0 V

V

IL

LOW Level Input Voltage 2.7 − 3.6 0.8 V

V

OH

HIGH Level Output Voltage IOH = −100 µA2.7 − 3.6 VCC − 0.2

V

B Outputs IOH = −6 mA 2.7 2.2

IOH = −8 mA 3.0 2.4
IOH = −12 mA 3.0 2.2

HIGH Level Output Voltage IOH = −100 µA2.7 − 3.6 VCC − 0.2

V

A Outputs IOH = −12 mA 2.7 2.2

IOH = −18 mA 3.0 2.4
IOH = −24 mA 3.0 2.2

V

OL

LOW Level Output Voltage IOL = 100 µA2.7 − 3.6 0.2

V

B Outputs IOL = 6 mA 2.7 0.4

IOL = 8 mA 3.0 0.55
IOL = 12 mA 3.0 0.8

LOW Level Output Voltage IOL = 100 µA2.7 − 3.6 0.2

V

A Outputs IOL = 12 mA 2.7 0.4

IOL = 18 mA 3.0 0.4
IOL = 24 mA 3.0 0.55

I

I

Input Leakage Current 0V ≤ VI ≤ 3.6V 2.7 − 3.6 ±5.0 µA

I

OZ

3-STATE Output Leakage 0V ≤ VO ≤ 3.6V 2.7 − 3.6 ±10 µA

VI = VIH or V

IL

I

OFF

Power Off Leakage Current 0V ≤ (VI, VO) ≤ 3.6V 0 10 µA

I

CC

Quiescent Supply Current VI = VCC or GND 2.7 − 3.6 20

µA

VCC ≤ (VI, VO) ≤ 3.6V (Note 8) 2.7 − 3.6 ±20

∆I

CC

Increase in ICC per Input VIH = VCC − 0.6V 2.7 − 3.6 750 µA