Fairchild Semiconductor 74VCX16240MTDX, 74VCX16240MTD, 74VCX16240MEAX, 74VCX16240MEA Datasheet
January 1998
Revised April 1999
74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
© 1999 Fairchild Semiconductor Corporation DS500099.prf www.fairchildsemi.com
74VCX16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
3.6V Tolerant Inputs and Outputs
General Description
The VCX16240 contains sixte en inverting buffers with 3STATE outputs to be empl oyed as a m emory and a ddress
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX16240 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCX16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining low CMOS power dissipation.
Features
■ 1.65V–3.6V VCC supply operation
■ 3.6V tolerant inputs and outputs
■ t
PD
2.5 ns max for 3.0V to 3.6V V
CC
3.0 ns max for 2.3V to 2.7V VCC
6.0 ns max for 1.65V to 1.95V V
CC
■ Power-off high impedance inputs and outputs
■ Supports live insertion and withdrawal (Note 1)
■ Static Drive (I
OH/IOL
)
±24 mA @ 3.0V V
CC
±18 mA @ 2.3V V
CC
±6 mA @ 1.65V V
CC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state d uring power up or power
down, OE
should be tied to VCC through a pull-up r esistor; the min imum
value of the res istor is d eter mine d by the cu rre nt-sou rcin g ca pa bility of t he
driver.
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Logic Symbol Pin Descriptions
Order Number Package Number Package Descriptions
74VCX16240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
I
0–I15
Inputs
O
0–O15
Outputs
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74VCX16240
Connection Diagram Tr uth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
Functional Description
The 74VCX16240 contains sixteen inverting buffers with 3STATE outputs. The device is nibble (4 bits) controlled with
each nibble functioning identically, but independent of each
other. The control pins may be shorted together to obta in
full 16-bit operation .T he 3 -S TATE outputs are controlled by
an Output Enable (OEn) input. When OEn is LOW, the outputs are in the 2-state mode. When OE
n
is HIGH, the stan-
dard outputs are in the high impedance mode but this does
not interfere with entering new data into t he inputs.
Logic Diagram
Inputs Outputs
OE
1
I0–I
3
O0–O
3
LL H
LH L
HX Z
Inputs Outputs
OE
2
I4–I
7
O4–O
7
LL H
LH L
HX Z
Inputs Outputs
OE
3
I8–I
11
O8–O
11
LL H
LH L
HX Z
Inputs Outputs
OE
4
I12–I
15
O12–O
15
LL H
LH L
HX Z
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74VCX16240
Absolute Maximum Ratings(Note 2) Recommended Operating
Conditions
(Note 4)
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 3: I
O
Absolute Maximum Rating must be observed.
Note 4: Floating or unused inputs m us t be held HIGH or LOW.
DC Electrical Characteristics (2.7V < VCC ≤ 3.6V)
Note 5: Outputs disab led or 3-STATE only.
Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V
I
) −0.5V to +4.6V
Output Voltage (V
O
)
Outputs 3-STATED −0.5V to +4.6V
Outputs Active (Note 3) −0.5V to V
CC
+0.5V
DC Input Diode Current (I
IK
) VI < 0V −50 mA
DC Output Diode Current (I
OK
)
V
O
< 0V −50 mA
V
O
> V
CC
+50 mA
DC Output Source/Sink Current
(I
OH/IOL
) ±50 mA
DC V
CC
or GND Current per
Supply Pin (I
CC
or GND) ±100 mA
Storage Temperature Range (T
STG
) −65°C to +150°C
Power Supply
Operating 1.65V to 3.6V
Data Retention Only 1.2V to 3.6V
Input Voltage −0.3V to +3.6V
Output Voltage (V
O
)
Output in Active States 0V to V
CC
Output in 3-State 0.0V to 3.6V
Output Current in I
OH/IOL
VCC = 3.0V to 3.6V ±24 mA
V
CC
= 2.3V to 2.7V ±18 mA
V
CC
= 1.65V to 2.3V ±6 mA
Free Air Operating Temperature (T
A
) −40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
V
IN
= 0.8V to 2.0V, VCC = 3.0V 10 ns/V
Symbol Parameter Conditions
V
CC
Min Max Units
(V)
V
IH
HIGH Level Input Voltage 2.7 − 3.6 2.0 V
V
IL
LOW Level Input Voltage 2.7 − 3.6 0.8 V
V
OH
HIGH Level Output Voltage IOH = −100 µA2.7 − 3.6 VCC − 0.2 V
IOH = −12 mA 2.7 2.2 V
IOH = −18 mA 3.0 2.4 V
IOH = −24 mA 3.0 2.2 V
V
OL
LOW Level Output Voltage IOL = 100 µA2.7 − 3.6 0.2 V
IOL = 12 mA 2.7 0.4 V
IOL = 18 mA 3.0 0.4 V
IOL = 24 mA 3.0 0.55 V
I
I
Input Leakage Current 0 ≤ VI ≤ 3.6V 2.7 − 3.6 ±5.0 µA
I
OZ
3-STATE Output Leakage 0 ≤ VO ≤ 3.6V
2.7 − 3.6 ±10 µA
VI = VIH or V
IL
I
OFF
Power-OFF Leakage Current 0 ≤ (VI, VO) ≤ 3.6V 0 10 µA
I
CC
Quiescent Supply Current VI = VCC or GND 2.7 − 3.6 20 µA
VCC ≤ (VI, VO) ≤ 3.6V (Note 5) 2.7 − 3.6 ±20 µA
∆I
CC
Increase in ICC per Input VIH = VCC −0.6V 2.7 − 3.6 750 µA
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