Fairchild Semiconductor 74LVX240SJX, 74LVX240SJ, 74LVX240MX, 74LVX240MTCX, 74LVX240MTC Datasheet
...
May 1993
Revised March 1999
74LVX240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS011609.prf www.fairchildsemi.com
74LVX240
Low Voltage Octal Buffer/Line Driver with
3-STATE Outputs
General Description
The LVX240 is an octal inverting buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus or iented tra nsmitter or receive r which
provides improved PC board density. The inputs tolerate
up to 7V allowing interface of 5V systems to 3V systems.
Features
■ Input voltage translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending su ffix let te r “X” to the ordering code .
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Truth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Order Number Package Number Package Description
74LVX240M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-130, 0.300” Wide
74LVX240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0–I7
Inputs
O
0–O7
Outputs
Inputs Outputs
(Pins 12, 14, 16, 18)
OE
1
I
n
L L H
L H L
H X Z
Inputs Outputs
(Pins 3, 5, 7, 9)
OE
2
I
n
L L H
L H L
H X Z
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74LVX240
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: Absolute Maximum Ra tings are those values beyond which the
safety to the de v ic e cannot be guaranteed. The device should not b e operated at these limits. The param etric values defined in the Elec t ric al C haracteristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Cond itions” table w ill define the conditions for
actual device opera t ion.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
(Note 3)
Note 3: (Input tr = tf = 3 ns)
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= −0.5V −20 mA
DC Input Voltage (V
I
) −0.5V to 7V
DC Output Diode Current (I
OK
)
V
O
= −0.5V −20 mA
V
O
= VCC + 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC + 0.5V
DC Output Source
or Sink Current (I
O
) ±25 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
) ±75 mA
Storage Temperature (T
STG
) −65°C to +150°C
Power Dissipation (P
D
) 180 mW
Supply Voltage (V
CC
) 2.0V to 3.6V
Input Voltage (V
I
) 0V to 5.5V
Output Voltage (V
O
) 0V to V
CC
Operating Temperature (TA) −40°C to +85°C
Input Rise and Fall Time (∆t/∆V) 0 ns/V to 100 ns/V
Symbol Parameter
V
CC
TA = +25°CT
A
= −40°C to +85°C
Units Conditions
Min Typ Max Min Max
V
IH
HIGH Level 2.0 1.5 1.5
Input Voltage 3.0 2.0 2.0 V
3.6 2.4 2.4
V
IL
LOW Level 2.0 0.5 0.5
Input Voltage 3.0 0.8 0.8 V
3.6 0.8 0.8
V
OH
HIGH Level 2.0 1.9 2.0 1.9 VIN = VIH or VIL IOH = −50 µA
Output Voltage 3.0 2.9 3.0 2.9 V IOH = −50 µA
3.0 2.58 2.48 IOH = −4 mA
V
OL
LOW Level 2.0 0.0 0.1 0.1 VIN = VIH or VIL IOL = 50 µA
Output Voltage 3.0 0.0 0.1 0.1 V IOL = 50 µA
3.0 0.36 0.44 IOL = 4 mA
I
OZ
3-STATE Output 3.6 ±0.25 ±2.5 µAVIN = VIH or V
IL
Off-State Current V
OUT
= VCC or GND
I
IN
Input Leakage Current 3.6 ±0.1 ±1.0 µAVIN = 5.5V or GND
I
CC
Quiescent Supply Current 3.6 4.0 40.0 µAVIN = VCC or GND
Symbol Parameter
V
CC
(V)
TA = 25°C
Units
CL (pF)
Typ L imit
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3 0.5 0.8 V 50
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3 −0.5 −0.8 V 50
V
IHD
Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50
V
ILD
Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50
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