May 1993
Revised March 1999
74LVX157 Low Voltage Quad 2-Input Multiplexer
© 1999 Fairchild Semiconductor Corporation DS011608.prf www.fairchildsemi.com
74LVX157
Low Voltage Quad 2-Input Multiplexer
General Description
The LVX157 is a high-speed quad 2-input multiplexer. Four
bits of data from two sources can be selected using the
common Select and Enable inputs. The four outputs
present the selected data in the true (noninverted) form.
The LVX157 can also be used as a function gener ator.
Features
■ Input voltage level translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Devices are also avai lable in Tape and Reel. Specify by append ing letter suffix “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74LVX157M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74LVX157SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX157MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
I
0a–I0d
Source 0 Data Inputs
I
1a–I1d
Source 1 Data Inputs
E
Enable Input
S Select Input
Z
a–Zd
Outputs
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74LVX157
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Functional Description
The LVX157 is a quad 2-input multiplexer. It selects four
bits of data from two sources un der the control of a common Select input (S). The Enable input (E
) is active-LOW.
When E
is HIGH, all of the outputs (Z) are forced LOW
regardless of all other inputs. The LVX157 is the logic
implementation of a 4-pole, 2-position switch where the
position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs
are shown below:
Z
a
= E • (I1a • S + I0a • S)
Z
b
= E • (I
1b
• S + I0b • S)
Z
c
= E • (I
1c
• S + I0c • S)
Z
d
= E • (I
1d
• S + I0d • S)
A common use of the LVX157 is the moving of data from
two groups of registers to four common output busses. The
particular register from which the data comes is determined
by the state of t he S elect in put . A less ob vious us e is as a
function generator. The LVX157 can generate any four of
the sixteen different functions of two variables with one
variable common. This is useful for implementing gating
functions.
Logic Diagram
Inputs Outputs
E
SI0I
1
Z
HXXX L
LHXL L
LHXH H
LLLX L
LLHX H