Fairchild Semiconductor 74LVTH32244, 74LVT32244 Datasheet
74LVT32244 • 74LVTH32244
Low Voltage 32-Bit Buffer/Line Driver
with 3-STATE Outputs (Preliminary)
Preliminary
74LVT32244 • 74LVTH32244 Low Voltage 32-Bit Buffer/Line Driver with 3-STATE Outputs (Preliminary)
January 2001
Revised August 2001
General Description
The LVT32244 and LVTH32244 contain thirty-two noninverting buffers with 3-STATE outputs designed to be
employed as a memor y an d ad dr ess d rive r, clock driver, or
bus oriented transm itter /re cei ve r. The device is n ibbl e co ntrolled. Individual 3-STATE control inputs can be shorted
together for 8-bit, 16-bit, or 32-bit operation.
The LVTH32244 data inputs includ e bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These buffers and line drivers are designed for low-voltage
(3.3V) V
TTL interface to a 5V environment. The LVT32244 and
LVTH32244 are fabricated with an advanced BiCMOS
technology to achieve high speed ope ration similar to 5V
ABT while maintaining a low power dissipation
applications, but with the capability to provide a
CC
Features
■ Input and output interface capability to systems at
5V V
CC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH32244),
also available without bushold feature (74LVT32244).
■ Live insertion/extraction per mi tt ed
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink
■ ESD performance:
Human-body model
Machine model
Charged-device model
■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
(Preliminary)
−32 mA/+64 mA
> 2000V
> 200V
Ordering Code:
Order Number Package Number Package Description
74LVT32244GX
(Note 1)
74LVTH32244GX
(Note 1)
Note 1: BGA package available in Tape and Reel only.
BGA96A
(Preliminary)
BGA96A
(Preliminary)
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
Logic Symbol
> 1000V
© 2001 Fairchild Semiconductor Corporation DS500434 www.fairchildsemi.com
Preliminary
Connection Diagram
74LVT32244 • 74LVTH32244
(Top Thru View)
Pin Descriptions
Pin Names Description
OE
I
0–I31
O
0–O31
n
Output Enable Input (Active LOW)
Inputs
Outputs
Pin Assignments for FBGA
123456
A O
B O3O2GND GND I
C O5O4V
D O7O6GND GND I
E O9O8GND GND I
F O11O10V
G O13O12GND GND I
H O14O15OE4OE3I
J O17O16OE5OE6I
K O19O18GND GND I
L O
M O
N O25O24GND GND I
P O27O26V
R O29O28GND GND I
T O
O0OE1OE2I
1
CC1VCC1I4
CC1VCC1I10I11
21O20VCC2VCC2I20I21
23O22
30O31
GND GND I
CC2VCC2I26I27
OE8OE7I
0
2
6
8
12I13
15I14
16I17
18I19
22I23
24I25
28I29
31I30
Truth Tables
Inputs Outputs
OE
1
LL L
LH H
HX Z
Inputs Outputs
OE
2
LL L
LH H
HX Z
Inputs Outputs
OE
3
LL L
LH H
HX Z
Inputs Outputs
OE
4
LL L
LH H
HX Z
Inputs Outputs
OE
5
LL L
LH H
HX Z
I
1
I
3
I
5
I
7
I
9
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
Inputs Outputs
OE
6
LL L
LH H
HX Z
Inputs Outputs
OE
7
LL L
LH H
HX Z
Inputs Outputs
OE
8
LL L
LH H
HX Z
I0-I
I4-I
I8-I
I12-I
I16-I
I20-I
I24-I
I28-I
3
7
11
15
19
23
27
31
O0-O
O4-O
O8–O
O12-O
O16-O
O20-O
O24-O
O28-O
3
7
11
15
19
23
27
31
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