74LVT2244 • 74LVTH2244
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
74LVT2244 • 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
July 1999
Revised August 1999
General Description
The LVT2244 and LVTH2244 are octal buffers and line
drivers designed to be employ ed as memory addres s drivers, clock drivers and bus oriented transmitters or receivers
which provides improved P C boa rd density. The equivalent
25Ω-Series resistors helps reduce output overshoot and
undershoot.
The LVTH2244 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These octal buffers and line drivers are designed for lowvoltage (3.3V) V
provide a TTL interface to a 5V environment. The LVT2244
and LVTH2244 are fabricated with an advance d BiCMOS
technology to achiev e high speed operation similar to 5V
ABT while maintaining low power dissipation.
applications, but wi th the capability to
CC
Features
■ Input and output interface capability to systems at
5V V
CC
■ Equivalent 25Ω-Series resistors on outputs
■ Bushold data inputs elimina te the nee d for exte rnal pull-
up resistors to hold unused inp uts (74LVTH2244), also
available without bushold feature (74LVT2244).
■ Live insertion/extraction per mitt ed
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink −12 mA/+12 mA
■ Latch-up performance exce eds 500 mA
Ordering Code:
Order Number Package Number Package Description
74LVT2244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVT2244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT2244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH2244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVTH2244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH2244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.
Logic Symbol
IEEE/IEC
Connection Diagram
© 1999 Fairchild Semiconductor Corporation DS012170 www.fairchildsemi.com
Pin Descriptions Truth Tables
Pin Names Description
OE
I
0–I7
O
1
0–O7
, OE
3-STATE Output Enable Inputs
2
Inputs
Outputs
74LVT2244 • 74LVTH2244
Inputs Outputs
OE
I
1
n
(Pins 12, 14, 16, 18)
LL L
LH H
H X Z
Inputs Outputs
OE
2
I
n
(Pins 3, 5, 7, 9)
LL L
LH H
H X Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
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