Fairchild Semiconductor 74LVQ86SJX, 74LVQ86SJ, 74LVQ86SCX, 74LVQ86SC Datasheet

74LVQ86 Low Voltage Quad 2-Input Exclusive-OR Gate
General Description
The LVQ86 contains four 2-input exclusive-OR gates.
Features
n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package Number Package Description
74LVQ86SC M14A 14-Lead (0.150" Wide) Molded Small Outline Package, SOIC JEDEC 74LVQ86SJ M14D 14-Lead Small Outline Package, SOIC EIAJ
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram
Pin Descriptions
Pin Names Description
A
0–A3
Inputs
B
0–B3
Inputs
O
0–O3
Outputs
IEEE/IEC
DS011348-1
Pin Assignment
SOIC JEDEC and EIAJ
DS011348-2
May 1998
74LVQ86 Low Voltage Quad 2-Input Exclusive-OR Gate
© 1998 Fairchild Semiconductor Corporation DS011348 www.fairchildsemi.com
Absolute Maximum Ratings (Note 1)
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC+ 0.5V
DC Output Source
or Sink Current (I
O
)
±
50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
±
200 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
DC Latch-Up Source or
Sink Current
±
100 mA
Recommended Operating Conditions
(Note 2)
Supply Voltage (V
CC
)
LVQ 2.0V to 3.6V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA)
74LVQ −40˚C to +85˚C
Minimum Input Edge Rate (V/t)
V
IN
from 0.8V to 2.0V
V
CC
@
3.0V 125 mV/ns
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed.The device should not be op­erated at these limits. The parametric values defined in the Electrical Charac­teristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for ac­tual device operation .
Note 2: Unused inputs must be held HIGH or LOW.. They may not float.
DC Electrical Characteristics
Symbol Parameter
V
CC
(V)
Units ConditionsT
A
=
25˚C T
A
=
−40˚C to +85˚C
Typ Guaranteed Limits
V
IH
Minimum High Level 3.0 1.5 2.0 2.0 V V
OUT
=
0.1V
Input Voltage or V
CC
− 0.1V
V
IL
Maximum Low Level 3.0 1.5 0.8 0.8 V V
OUT
=
0.1V
Input Voltage or V
CC
− 0.1V
V
OH
Minimum High Level Output Voltage
3.0 2.99 2.9 2.9 V I
OUT
=
−50 µA
3.0 2.58 2.48 V V
IN
=
V
IL
or VIH(Note 3)
I
OH
=
−12 mA
V
OL
Maximum Low Level Output Voltage
3.0 0.002 0.1 0.1 V I
OUT
=
50 µA
3.0 0.36 0.44 V
IN
=
V
IL
or VIH(Note 3)
I
OL
=
12 mA
I
IN
Maximum Input 3.6
±
0.1
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
I
OLD
Minimum Dynamic (Note 4) 3.6 36 mA V
OLD
=
0.8V Max (Note 5)
I
OHD
Output Current 3.6 −25 mA V
OHD
=
2.0V Min (Note 5)
I
CC
Maximum Quiescent 3.6 2.0 20.0 µA V
IN
=
V
CC
or GND
Supply Current
V
OLP
Quiet Output 3.3 0.5 0.8 V (Notes 6, 7) Maximum Dynamic V
OL
V
OLV
Quiet Output 3.3 −0.5 −0.8 V (Notes 6, 7) Minimum Dynamic V
OL
V
IHD
Maximum High Level 3.3 1.8 2.0 V (Notes 6, 8) Dynamic Input Voltage
V
ILD
Maximum Low Level 3.3 1.8 0.8 V (Notes 6, 8) Dynamic Input Voltage
Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 20 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75for commercial temperature range is guaranteed for 74LVQ. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold (V
IHD
),
f=1 MHz.
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