![](/html/26/26cf/26cfc096c46faf2057d55ce97414c1cd9bcf27471b7d07907c9e59d28265b00e/bg1.png)
74LVQ244
Low Voltage Octal Buffer/Line Driver with 3-STATE
Outputs
General Description
The LVQ244isanoctalbufferandlinedriverdesignedtobe
employed as a memory address driver, clock driver and bus
oriented transmitter or receiver which provides improved PC
board density.
Features
n Ideal for low power/low noise 3.3V applications
n Implements patented EMI reduction circuitry
n Available in SOIC JEDEC, SOIC EIAJ and QSOP
packages
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Improved latch-up immunity
n Guaranteed incident wave switching into 75Ω
n 4 kV minimum ESD immunity
Ordering Code:
Order Number Package Number Package Description
74LVQ244SC M20B 20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC
74LVQ244SJ M20D 20-Lead Shrink Molded Small Outline Package, SOIC, EIAJ
74LVQ244QSC MQA20 20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram
IEEE/IEC
DS011356-1
Pin Assignment for SOIC and QSOP
DS011356-2
May 1998
74LVQ244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
© 1998 Fairchild Semiconductor Corporation DS011356 www.fairchildsemi.com
![](/html/26/26cf/26cfc096c46faf2057d55ce97414c1cd9bcf27471b7d07907c9e59d28265b00e/bg2.png)
Truth Tables
Inputs Outputs
OE
1In
(Pins 12, 14, 16, 18)
LL L
LH H
HX Z
Inputs Outputs
OE
2In
(Pins 3, 5, 7, 9)
LL L
LH H
HX Z
H=HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
Z=High Impedance
Pin Descriptions
Pin Names Description
OE
1
,OE
2
3-STATE Output Enable Inputs
I
0–I7
Inputs
O
0–O7
Outputs
www.fairchildsemi.com 2