Fairchild Semiconductor 74LVQ14SJX, 74LVQ14SJ, 74LVQ14SCX, 74LVQ14SC Datasheet

74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input
General Description
The LVQ14 contains six inverter gates each with a Schmitt trigger input. They are capable of transforming slowly chang­ing input signals into sharply defined, jitter-free output sig­nals. In addition, they have a greater noise margin than con­ventional inverters.
Features
n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Guaranteed pin-to-pin skew AC performance n Guaranteed incident wave switching into 75
Ordering Code:
Order Number Package Number Package Description
74LVQ14SC M14A 14-Lead (0.150" Wide) Molded Small Outline Integrated Circuit, SOIC JEDEC 74LVQ14SJ M14D 14-Lead Small Outline Package, SOIC EIAJ
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names Description
I
n
Inputs
O
n
Outputs
Connection Diagram
Truth Table
Input Output
IO
LH HL
H
=
High Voltage Level
L=Low Voltage Level
IEEE/IEC
DS011345-1
Pin Assignment
for SOIC JEDEC and EIAJ
DS011345-2
May 1998
74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input
© 1998 Fairchild Semiconductor Corporation DS011345 www.fairchildsemi.com
Absolute Maximum Ratings (Note 1)
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to to VCC+ 0.5V
DC Output Source
or Sink Current (I
O
)
±
50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
±
200 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
DC Latch-Up Source or
Sink Current
±
100 mA
Recommended Operating Conditions
(Note 2)
Supply Voltage (V
CC
)
LVQ 2.0V to 3.6V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA) −40˚C to +85˚C Minimum Input Edge Rate (V/t)
V
IN
from 0.8V to 2.0V
V
CC
@
3.0V 125 mV/ns
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of thedevicecannot be guaranteed. The device should not be op­erated at these limits. The parametric values defined in the Electrical Charac­teristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for ac­tual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol Parameter
V
CC
(V)
T
A
=
+25˚C T
A
=
−40˚C to +85˚C Units Conditions
Typ Guaranteed Limits
V
OH
Minimum High Level Output Voltage
3.0 2.99 2.9 2.9 V I
OUT
=
−50 µA
3.0 2.58 2.48 V V
IN
=
V
IL
or VIH(Note 3)
I
OH
=
−12 mA
V
OL
Maximum Low Level Output Voltage
3.0 0.002 0.1 0.1 V I
OUT
=
50 µA
3.0 0.36 0.44 V V
IN
=
V
IL
or VIH(Note 3)
I
OL
=
12 mA
I
IN
Maximum Input Leakage Current
3.6
±
0.1
±
1.0 µA V
I
=
V
CC
, GND
V
t+
Maximum Positive Threshold
3.0 2.2 2.2 V T
A
=
Worst Case
V
t−
Minimum Negative Threshold
3.0 0.5 0.5 V T
A
=
Worst Case
V
h(max)
Maximum Hysteresis 3.0 1.2 1.2 V T
A
=
Worst Case
V
h(min)
Minimum Hysteresis 3.0 0.3 0.3 V T
A
=
Worst Case
I
OLD
Minimum Dynamic (Note 4) Output Current
3.6 36 mA V
OLD
=
0.8V Max (Note 5)
I
OHD
3.6 −25 mA V
OHD
=
2.0V Min (Note 5)
I
CC
Maximum Quiescent Supply Current
3.6 2.0 20.0 µA V
IN
=
V
CC
or GND
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3 0.9 1.1 V (Notes 6, 7)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3 −0.8 −1.1 V (Notes 6, 7)
V
IHD
Maximum High Level Dynamic Input Voltage
3.3 1.9 2.0 V (Notes 6, 8)
V
ILD
Maximum Low Level Dynamic Input Voltage
3.3 1.3 2.0 V (Notes 6, 8)
Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75for commercial temperature range is guaranteed for 74LVQ. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold (V
IHD
),
f=1 MHz.
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