Fairchild Semiconductor 74LCX32245 Datasheet

74LCX32245 Low Voltage 32-Bit Bidirectional Trans ceiver
with 5V Tolerant Inputs and Outputs
74LCX32245 Low Voltage 32-Bit Bidirectional Transceiver with 5V T olerant Inputs and Outputs
November 2001 Revised June 2002
General Description
facing to a 5V signal environment. The device is byte controlled. Each byte has separate control inputs which could be shorted toge ther fo r ful l 32-bit op eration . The T /R inputs determine the direction of data flow through the device. The OE placing them in a high impedance state.
The LCX32245 is fabricated with an advanced CMOS tech­nology to achieve high s peed operation while maintaining CMOS low power dissipation.
applications with capability of inter-
CC
inputs disable bo th the A and B ports by
Features
5V tolerant inputs and outputs
2.3V–3.6V V
4.5 ns t
Power down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
±24 mA output drive (V
Uses patented noise/EMI reductio n circuitr y
Latch-up performance exce eds 500 mA
ESD performance:
Human body model Machine model
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up res istor: the m inimu m value or t he resistor is determin ed by the current-sourc ing capability of the driver.
specifications provided
CC
max (VCC = 3.3V), 20 µA ICC max
PD
> 200V
Ordering Code:
Order Number Package Number Package Description
74LCX32245G (Note 2)(Note 3)
Note 2: Ordering code G indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending th e s uffix let t er X to the ordering code.
BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Logic Symbol
= 3.0V)
CC
> 2000V
© 2002 Fairchild Semiconductor Corporation DS500428 www.fairchildsemi.com
Connection Diagram
74LCX32245
(Top Thru View)
Pin Descriptions
Pin Names Descriptio n
OE T/R A B
n
n 0–A31 0–B31
Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs
FBGA Pin Assignments
123456
A B B B C B D B E B F B11B10V G B13B12GND GND A12A
H B14B15T/R2OE2A J B
K B19B18GND GND A18A L B M B23B22GND GND A22A N B25B24GND GND A24A P B R B29B28GND GND A28A
T B
B0T/R1OE1A
1
B2GND GND A2A
3
B4V
5 7 9
17B16
21B20VCCVCCA20A21
27B26VCCVCCA26A27
30B31
CCVCCA4
B6GND GND A6A B8GND GND A8A
CCVCCA10A11
T/R3OE3A
T/R4OE4A
A
0
A
15A14 16A17
31A30
1 3 5 7 9
13
19
23 25
29
Truth Tables
Inputs
OE
T/R
1
1
L L Bus B0–B7 Data to Bus A0–A L H Bus A0–A7 Data to Bus B0–B H X HIGH Z State on A0–A7, B0–B
Inputs
OE
T/R
3
3
L L Bus B16–B23 Data to Bus A16–A L H Bus A16–A23 Data to Bus B16–B H X HIGH Z State on A16–A23, B16–B
H = HIGH Voltage Level L = LOW Voltage Level
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Outputs
7 7
7
Outputs
23 23
23
Inputs
OE
T/R
2
2
LLBus B
Outputs
Data to Bus A8–A
8–B15
L H Bus A8–A15 Data to Bus B8–B H X HIGH Z State on A8–A15, B8–B
OE
Inputs
4
T/R
4
Outputs
L L Bus B24–B31 Data to Bus A24–A L H Bus A24–A31 Data to Bus B24–B
H X HIGH Z State on A24–A31, B24–B
X = Immaterial (HIGH or LOW, inputs and I/Os may not float) Z = High Impedance
15 15
15
31 31
31
Logic Diagrams
74LCX32245
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