Fairchild Semiconductor 74LCX16500MTDX, 74LCX16500MTD, 74LCX16500MEAX, 74LCX16500MEA, 74LCX16500GX Datasheet

March 1995
Revised April 1999

74LCX16500 Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs

© 1999 Fairchild Semiconductor Corporation DS012407.prf www.fairchildsemi.com

74LCX16500
Low Voltage 18-Bit Universal Bus Transceivers with

5V Tolerant Inputs and Outputs

General Description

These 18-bit universal bus transceivers combine D-type
latches and D-type flip-flops to allow data flow in transpar­ent, latched, and clocked modes.

Data flow in each dir ection is controlled by o utput-enable
(OEAB and OEBA

), latch-enable (LEAB and LEBA), and

clock (CLKAB

and CLKBA) inputs.

The LCX16500 is desi gned for low vol tage (2.5V or 3.3V )
V

CC

applications with the capability of interfacing to a 5V
signal environment.
The LCX16500 is fabricated with an advanced CMOS tech-

nology to achieve high spee d operation while mai ntaining
CMOS low power.

Features

■ 5V tolerant inputs and outputs

■ 2.3V–3.6V V

CC

specifications provided

■ 6.0 ns t

PD

max (VCC = 3.3V), 20 µA ICC max

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■ ±24 mA output drive (V

CC

= 3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human body model > 2000V
Machine model > 200V

Note 1: To ensure the high-impedan c e state during power up or down, OE
should be tied to V

CC

and OE tied t o GND through a resistor: the min im um

value or the resis tor i s dete rmin ed by the cur ren t-sour cing cap ab ility of the
driver.

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending su ffix let te r “X” to the ordering code.

Order Number Package Number Package Description

74LCX16500MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LCX16500MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

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74LCX16500

Connection Diagram Tr uth Table (Note 2)

Note 2: A-to-B data flow is shown: B-to-A flow is si milar but uses OE BA,

LEBA, and CLKBA

.

Note 3: Output level before the indicated steady-state inp ut conditions
were established.

Note 4: Output level before the indicated steady-state inp ut conditions
were established, provided that CLKAB

was LOW before LE AB went LOW.

Functional Description

For A-to-B data flow, the LCX16500 operat es in the tran s­parent mode when L EAB is HIGH. When LEAB is LOW,
the A data is latched if CLKAB

is held at a HIGH or LOW
logic level. If LEAB is LOW, the A bus data is stored in the
latch/flip-flop on the HIGH-to-LOW transition of CLKAB

.

Output-enable OEAB is active-HIGH. When OEAB is

HIGH, the outputs are active. When OEAB is LOW , the out­puts are in the high impedance state.

Data flow for B to A is similar to th at of A to B but uses
OEBA

, LEBA, and CLKBA. The output enables are com-

plementary (OEAB is active HIGH and OEBA

is active

LOW).

Logic Diagram

Inputs Output

OEAB LEAB CLKAB

A

n

B

n

LX XXZ
HH XL L
HH XHH
HL ↓ LL
HL ↓ HH
HL HXB

0

(Note 3)

HL LXB

0

(Note 4)

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74LCX16500

Absolute Maximum Ratings(Note 5)

Recommended Operating Conditions (Note 7)

Note 5: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated

at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom­mended Operating C onditions” table will define the conditions for actual device operation.

Note 6: I

O

Absolute Maximum Rating must be observed.

Note 7: Unused (inputs or I/O's) must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Symbol Parameter Value Conditions Units

V

CC

Supply Voltage −0.5 to +7.0 V

V

I

DC Input Voltage −0.5 to +7.0 V

V

O

DC Output Voltage −0.5 to +7.0 Output in 3-STATE

V

−0.5 to V

CC

+ 0.5 Output in HIGH or LOW State (Note 6)

I

IK

DC Input Diode Current −50 VI < GND mA

I

OK

DC Output Diode Current −50 VO < GND

mA

+50 V

O

> V

CC

I

O

DC Output Source/Sink Current ±50 mA

I

CC

DC Supply Current per Supply Pin ±100 mA

I

GND

DC Ground Current per Ground Pin ±100 mA

T

STG

Storage Temperature −65 to +150 °C

Symbol Parameter Min Max Units

V

CC

Supply Voltage Operating 2.0 3.6

V

Data Retention 1.5 3.6

V

I

Input Voltage 0 5.5 V

V

O

Output Voltage HIGH or LOW State 0 V

CC

V

3-STATE 0 5.5

I

OH/IOL

Output Current VCC = 3.0V − 3.6V ±24

mAV

CC

= 2.7V − 3.0V ±12

V

CC

= 2.3V − 2.7V ±8

T

A

Free-Air Operating Temperature −40 85 °C

∆t/∆V Input Edge Rate, V

IN

= 0.8V–2.0V, VCC = 3.0V 0 10 ns/V

Symbol Parameter Conditions

V

CC

TA = −40°C to +85°C

Units

(V) Min Max

V

IH

HIGH Level Input Voltage 2.3 − 2.7 1.7

V

2.7 − 3.6 2.0

V

IL

LOW Level Input Voltage 2.3 − 2.7 0.7

V

2.7 − 3.6 0.8

V

OH

HIGH Level Output Voltage IOH = −100 µA2.3 − 3.6 VCC − 0.2

V

IOH = −8 mA 2.3 1.8
IOH = −12 mA 2.7 2.2
IOH = −18 mA 3.0 2.4
IOH = −24 mA 3.0 2.2

V

OL

LOW Level Output Voltage IOL = 100 µA2.3 − 3.6 0.2

V

IOL = 8 mA 2.3 0.6
IOL = 12 mA 2.7 0.4
IOL = 16 mA 3.0 0.4
IOL = 24 mA 3.0 0.55

I

I

Input Leakage Current 0 ≤ VI ≤ 5.5V 2.3 − 3.6 ±5.0 µA

I

OZ

3-STATE I/O Leakage 0 ≤ VO ≤ 5.5V 2.3 − 3.6 ±5.0

µA

VI = VIH or V

IL

I

OFF

Power-Off Leakage Current VI or VO = 5.5V 0 10 µA