© 1999 Fairchild Semiconductor Corporation DS010652 www.fairchildsemi.com
March 1990
Revised August 1999
74F794 8-Bit Register with Readback
74F794
8-Bit Register with Readback
General Description
The 74F794 is an 8-bit register with readback capability
designed to store data as well as read the register information back onto the data bus. The I/O bus (D bus) has 3STATE outputs. Current sinking capability is 64 mA on both
the D and Q busses.
Data is loaded into the registers on the LOW-to-HIGH transition of the clock (CP). The outp ut enable (OE
) is used to
enable data on D
0–D7
. When OE is LOW, the output of the
registers is enabled on D
0–D7
, enabling D as an outp ut
bus. When OE is HIGH, D
0–D7
are inputs to t he registers
configuring D as an input bus.
Features
■ 3-STATE outputs on the I/O port
■ D and Q output sink capability of 64 mA
■ Functionally and pin equivalent to the 74LS794
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Logic Symbol Connection Diagram
Order Number Package Number Package Description
74F794SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F794PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide