Fairchild Semiconductor 74F583SC, 74F583PC, 74F583SCX Datasheet

April 1988
Revised March 1999

74F583 4-Bit BCD Adder

© 1999 Fairchild Semiconductor Corporation DS009570.prf www.fairchildsemi.com

74F583
4-Bit BCD Adder

General Description

The ’F583 high-speed 4-bit, BCD full adder with internal
carry lookahead accep ts two 4-bit decimal numbers (A

0

–

A

3

, B0–B3) and a Carry Input (Cn). It generates the decimal

sum outputs (S

0–S3

), and a Carry Out put (C

n+4

) if the sum

is greater than 9. The 'F583 is the functional equ ivalent of
the 82S83.

Features

■ Adds two decimal numbers

■ Full internal lookahead

■ Fast ripple carry for economical expansion

■ Sum output delay time 16.5 ns max

■ Ripple carry delay time 8.5 ns max

■ Input to ripple delay time 14.0 ns max

■ Supply current 60 mA max

Ordering Code:

Logic Symbols

IEEE/IEC

Connection Diagram

Unit Loading/Fan Out

Order Number Package Number Package Description

74F583SC M16B 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F583PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

74F

Pin

Names

Description U.L. Input I

IH/IIL

HIGH/LOW Output IOH/I

OL

A0–A

3

A Operand Inputs 1.0/2.0 20 µA/−1.2 mA

B

0–B3

B Operand Inputs 1.0/2.0 20 µA/−1.2 mA

C

n

Carry Input 1.0/1.0 20 µA/−0.6 mA

S

0–S3

Sum Outputs 50/33.3 −1 m A/20 mA

C

n+4

Carry Output 50/33.3 −1 mA/20 mA

www.fairchildsemi.com 2

74F583

Functional Description

The ’F583 4-bit binary coded (BCD) full adder performs the
addition of two deci mal num bers (A

0–A3

, B0–B3). The loo-

kahead generates the BCD carry terms internally, allowing
the 'F583 to then do BCD addition correctly. For BCD num­bers 0 through 9 at A a nd B inputs, the B CD sum forms at
the output. In the addition of two BCD numbers totalling a
number greater than 9, a valid BCD number and a carry will
result.

For input values larger than 9, the number is converted
from binary to BCD. Binary to BCD conver sion occurs by
grounding one set of inputs, A

n

or Bn, and applying any 4-

bit binary number to the other set of inpu ts. If the input is
between 0 and 9, a BC D number occurs at the ou tput. If
the binary input falls b etween 10 and 15, a carry term is
generated. Both the carry term and the sum are the BCD
equivalent of the binary i nput. Converting binar y numbers
greater than 16 may be achieved through cascading
'F583s.

Logic Diagram

Please note that this diagram is provided only for the understan ding of logic operation s and should not be used t o es t im ate propagation delays.