USB1T1104
Universal Serial Bus Peripheral Transceiver
with Voltage Regulator
USB1T1104 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
August 2004
Revised August 2005
General Description
The USB1T1104 is an Universal Serial Bus Specification Rev
2.0 compliant transceiver. The device provides an USB interface for Full-Speed (12Mbit/s) USB applications. The
USB1T1104 provides excellent flexibility, allowing differential
and single ended inputs while an integrated voltage regulator
sets the I/O level to 1.65V to 3.6V . Utilizing an integrated 5.0V to
3.3V voltage regulator, the part can be powered directly from
the USB host (V
local sources while used in devices with low supply voltages.
The USB1T1104 provides 15kV ESD protection on the USB bus
pins (D
/D
devices while providing excellent protection to larger and more
expensive ASICs and USB controllers.
) to minimize the power consumed from the
BUS
). This eliminates the need for any external ESD
Features
O
Complies with Universal Serial Bus Specification 2.0
O
Integrated 5V to 3.3V voltage regulator for powering VBus
O
Utilizes digital inputs and outputs to transmit and receive USB
cable data
1OEIOutput Enable: Active LOW enables the transceiver to transmit data on the bus. When not
active the transceiver is in the receive mode (CMOS level is relative to V
CCIO
)
2RCVOReceive Data Output: Non-inverted CMOS level output for USB differential Input (CMOS
3V
4V
p
m
output level is relative to V
and preserved during SE0 condition.
OSingle-ended D receiver output VP (CMOS level relative to V
detection of SEO, error conditions, speed of connected device; Driven HIGH when no
supply connected to V
OSingle-ended D receiver output Vm (CMOS level relative to V
). Driven LOW when SUSPN is HIGH; RCV output is stable
CCIO
): Used for external
CCIO
CC
and V
REG
.
): Used for external
CCIO
detection of SEO, error conditions, speed of connected device; Driven HIGH when no
supply connected to V
5SUSPNDISuspend: Enables a low power state (CMOS level is relative to V
CC
and V
REG
.
).
CCIO
While the SUSPND pin is active (HIGH) it will drive the RCV pin to logic “0” state.
6MODEIMODE input (CMOS level is relative to V
, Vmo) whereas a LOW enables the single-ended MODE (Vo, V
(V
po
Table 4
7V
CCIO
Supply Voltage for digital I/O pins (1.65V to 3.6V): When not connected the D and D
pins are in 3-STATE. This supply bus is totally independent of V
8VbusmonOVbus monitor output (CMOS level relative to V
3.6V then Vbusmon = LOW.
10, 9D
11V
Vbusmon = HIGH and when Vbus
, D
AI/OData , Data : Differential data bus conforming to the USB standard.
/ V
po
o
IDriver Data Input (CMOS level is relative to V
). A HIGH selects the differential input MODE
CCIO
): When Vbus ! 4.1V then
CCIO
); Schmitt trigger input; see Table 2 and
CCIO
FSEO
(5V) and V
CC
) see T able 2 and
Table 3
12V
mo
/ F
SEO
IDriver Data Input (CMOS level is relative to V
); Schmitt trigger input; see Table 2 and
CCIO
Table 3
13V
14V
15V
(3.3V)Internal Regulator Option: Regulated supply output voltage (3.0V to 3.6V) during 5V oper-
REG
ation; decoupling capacitor of at least 0.1
(5.0V)Internal Regulator Option: Used as supply voltage input (4.0V to 5.5V); can be connected
CC
(3.3V)Pull-up Supply Voltage (3.3V r 10%): Connect an external 1.5k: resistor on D (FS data
PU
directly to USB line Vbus.
rate); Pin function is controlled by Config input pin:
Config = LOW
Config = HIGH
VPU (3.3V) is floating (High Impedance) for zero pull-up current.
VPU (3.3V) = 3.3V; internally connected to V
P
F is required.
REG
(3.3V).
16ConfigIUSB connect or disconnect software control input. Configures 3.3V to external 1.5k
resistor on D
when HIGH.
REG
(3.3V).
:
www.fairchildsemi.com2
USB1T1104
Terminal
Number
Exposed
Diepad
Terminal
Name
GNDGNDGND supply down bonded to exposed diepad to be connected to the PCB GND.
I/OTerminal Description
Functional Description
The USB1T1104 transceiver is designed to convert CMOS data
into USB differential bus signal levels and to convert USB differential bus signal to CMOS data.
To minimize EMI and noise t he outputs are edge rate controlled
with the rise and fall times controlled and defined for full speed
data rates. The rise, fall times are balanced between the differential pins to minimize skew.
Table 1 describes the specific pin functionality selection.
Table 2, Table 3, and Table 4 describe the specific Truth Tables
for Driver and Receiver operating functions.
The USB1T1104 also has the capability of various power supply
configurations to support mixed voltage supply applications (see
Table 5) and Power Supply Configurations and Options for
detailed descriptions.
V
p/Vm
ActiveDriving during Suspend
ActiveLow Power State
(Differential Receiver Inactive)
Function
Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors.
Note 2: For SUSPND = HIGH mode the differential receiver is inactive and the output RCV output is forced LOW. The out-of-suspend signaling (K) is detected via the single-
ended receiver outputs of the Vp and Vm pins.
TABLE 2. Driv e r Func tion (OE = L) using Differential Input Interface Mode Pin = H