Fairchild USB100 service manual

查询USB100供应商
PRELIMINARY
USB100 Programmable Low-Cost USB Machine (PLUM)
Single Chip Controller for Mouse, Trackball, Joystick and Gamepad Applications
USB100 Programmable Low-Cost USB Machine (PLUM)
January 1999
General Description
The device includes the necessary transceiver for USB operation and meets all of the active and standby current specifications for a bus-powered device.
Block Diagram
Features
USB 1.0 standard compliant
Has the necessary on-chip transceivers
Support for 2D and 3D mice with 2, 3 or more buttons
Supports 3 potentiometer mechanisms for joysticks
Up to 16 buttons for digital gamepads
Choice of 18-pin and 24-pin packages
Choice of 2Kbit and 4Kbit EEPROM densities
POWER
USB
COMMAND
PROCESSOR
(HID)
EEPROM
USB100 rev.D © 1999 Fairchild Semiconductor Corporation
TX-FIFO
RX-FIFO
STATE MACHINE
UP TO 3 ROLLER/
POTENTIOMETER
MECHANISMS
SERIAL
INTERFACE
ENGINE
UP TO 16 BUTTONS
1
X C V R
Use "A Diagram Number" Style Sheet"
USB CABLE (D+, D-, POWER & GROUND)
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Pinout
USB100 Programmable Low-Cost USB Machine (PLUM)
24 Pin Package 18 Pin 3D Package
OSC1 VDD OSC2 B6
H4 USBD+
B8/F USBD-
RESET GND
H3 B7 H1 B5 H2 B1 V1 B2 V2 B3
O2 B4
GND O1
Pin Description
Pin Type Description
H4 I Roller/Button/Joystick input. H3 I Roller/Button/Joystick input.
O2 I/O Register output pin / Button input. OSC1 I Crystal input number 1. OSC2 I Crystal input number 2
B4 I Button input Reset I Active high reset pin
H1 I Roller/Button/Joystick input.
H2 I Roller/Button/Joystick input.
V1 I Roller/Button/Joystick input.
V2 I Roller/Button/Joystick input.
GND I Ground
B7 I Button input
B6 I Button input
B5 I Button input
VDD I Positive power supply
USBD+ O USB D + line
USBD- O USB D – line
GND I Ground B8/F I/O Button input / LED driver
B1/CS I Button input and chip select to internal
B2/SK I Button input and system clock to internal
B3/DI I Button input and data in to internal
O1/DO O Button input and data out to read from
* See Programming internal EEPROM section
OSC2 OSC1
H4 VDD
F USBD+
RESET USBD-
H3 GND H1 B1 H2 B2 V1 B3 V2 O1
EEPROM.*
EEPROM.*
EEPROM.*
internal EEPROM.*
USB100 rev.D
2
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USB100 Programmable Low-Cost USB Machine (PLUM)
Absolute Maximum Ratings
Ambient Storage Temperatures -65°C to + 150°C All Input or Output Voltages with VCC + 1 to – 0.3V
Operating Conditions
Ambient Operating Temperature 0°C to +70°C Power Supply (VCC) Range 4.4V to 5.5V
respect to ground
Lead Temperature +300%
(Soldering, 10 seconds)
ESD Rating 2000V
DC and AC Electrical Characteristics 4.4V VCC 5.5V
Symbol Parameter Conditions Min Max Units
I
CCA
I
CCS
V
IL
V
IH
V
OL
V
OH
I
IL
I
OL
F
SK
T
SKH
T
SKL
T
CS
T
CSS
T
DH
T
DIS
T
CSH
T
DIH
T
PD1
T
PD0
T
SY
T
DF
T
WP
Operating Current USB interface in active mode 40 mA Standby Current USB interface in suspend 500 µA Input Low Voltage 0.8 V Input High Voltage 2 V Output Low Voltage 0.4 V Output High Voltage 2.4 V Input Leakage Current 2.5 µA Output Leakage Current 2.5 µA SK Clock Frequency Note 3 0 1 MHz SK High Time 250 ns SK Low Time 250 ns Minimum CS Low Time Note 4 250 ns CS Setup Time 50 ns DO Hold Time 70 ns DI Setup Time 100 ns CS Hold Time 0 ns DI Hold Time 20 ns Output Delay to “1” 500 ns Output Delay to “0” 500 ns CS to Status Valid 500 ns CS to DO in TRI-STATE 100 ns Write Cycle Time 10 ms
AC Test Conditions
Output Load 1 TTL Gate Input Pulse Levels 0.4V and 2.4V
Note 1: Stress ratings above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note 2: The shortest allowable S clock period = 1/fSK (as shown under the fSK parameter). Maximum SK clock speed (minimum SK period) is determined by the interaction of several AC parameters stated in the datasheet. Within this SK period, both t t
(minimum) for shorter SK cycle time operation.
SKL
Note 3: CS (Chip Select) must be brought low (to VIL) for an interval of tCS in order to reset all internal device registers (device reset) prior to beginning another opcode cycle. (This is shown in the opcode diagrams in the following pages.)
USB100 rev.D
SKH
and t
Timing Measurements Reference Level
Input 1V and 2V Output 0.8V and 2.0V
limits must be observed. Therefore, it is not allowable to set 1/fSK = t
SKL
3
SKH
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