Fairchild SSM1N45B service manual

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SSM1N45B

450V N-Channel MOSFET

SSM1N45B

General Description

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well

Features

• 0.5A, 450V, R

• Low gate charge ( typical 6.5 nC)

• Low Crss ( typical 6.5 pF)

• 100% avalanche tested

• Improved dv/dt capability

• Gate-Source Voltage ± 50V guaranteed

DS(on)

= 4.25Ω @V

GS

= 10 V

suited for electronic ballasts based on half bridge configuration.

D

!!!!

D

●●●●

◀◀◀◀

▲▲▲▲

●●●●

!!!!

S

G

Absolute Maximum Ratings

S

SOT-223

SSM Series

TC = 25°C unless otherw ise noted

!!!!

G

Symbol Parameter SSM1N45B Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt

P

D

Drain-Source Voltage 450 V

Drain Current

- Continuous (T

Drain Current - Pulsed

= 25°C)

C

= 100°C)

C

(Note 1)

0.5 A

0.32 A

4.0 A

Gate-Source Voltage ± 50 V

Single Pulsed Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

Power Dissipation (TA = 25°C)

Power Dissipation (T

= 25°C)

L

(Note 2)

(Note 1)

(Note 3)

108 mJ

0.5 A

0.25 mJ

5.5 V/ns

0.9 W

2.5 W

- Derate above 25°C 0.02 W/°C

, T

T

J

stg

T

L

Operating and Storage Temperature Range -55 to +150 °C

Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

300 °C

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θJA

Thermal Resistance, Junction-to-Ambient

(Note 6b)

-- 63 °C/W

Rev. A, May 2004

SSM1N45B

Electrical Characteristics

TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T

I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage

Breakdown Voltage Temperature Coefficient

J

Zero Gate Voltage Drain Current

Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, I

V

GS

I

= 250 µA, Referenced to 25°C

D

V

= 450 V, VGS = 0 V

DS

= 360 V, TC = 125°C

V

DS

= 50 V, VDS = 0 V

V

GS

= -50 V, VDS = 0 V

V

GS

= 250 µA

D

450 -- -- V

-- 0.5 -- V/°C

-- -- 10 µA

-- -- 100 µA

-- -- 100 nA

-- -- -100 nA

On Characteristics

V

R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage

Static Drain-Source On-Resistance

Forward Transconductance

= VGS, I

V

DS

V

= VGS, ID = 250 mA

DS

= 10 V, ID = 0.25 A

V

GS

= 50 V, ID = 0.25 A

V

DS

= 250 µA

D

(Note 4)

2.3 3.0 3.7 V

3.5 4.2 4.9 V

-- 3.4 4.25 Ω

-- 0.7 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance

Output Capacitance -- 29 40 pF

Reverse Transfer Capacitance -- 6.5 8.5 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 185 240 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g

gs

gd

Turn-On Delay Time

Turn-On Rise Time -- 21 50 ns

Turn-Off Delay Time -- 23 55 ns

Turn-Off Fall Time -- 36 80 ns

Total Gate Charge

Gate-Source Charge -- 0.9 -- nC

Gate-Drain Charge -- 3.2 -- nC

= 225 V, ID = 0.5 A,

V

DD

= 25 Ω

R

G

(Note 4,5)

V

= 360 V, ID = 0.5 A,

DS

V

= 10 V

GS

(Note 4,5)

-- 7.5 25 ns

-- 6.5 8.5 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 75mH, I

3. I

SD

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

6. a) Reference point of the R b) When mounted on the minimum pad size recommended (PCB Mount) (R

Maximum Continuous Drain-Source Diode Forward Current -- -- 0.5 A

Maximum Pulsed Drain-Source Diode Forward Current -- -- 4.0 A

Drain-Source Diode Forward Voltage

Reverse Recovery Time Reverse Recovery Charge -- 0.26 -- µC

= 1.6A, VDD = 50V, R

AS

≤ 0.5A, di/dt ≤ 300A/µs, VDD ≤ BV

is the sum of the junction-to-case and case-to-ambient thermal resistance. R

JA

θ

G

is the drain lead

JL

θ

= 25 Ω, Starting T

Starting TJ = 25°C

DSS,

= 25°C

J

V

GS

V

GS

dI

= 0 V, IS = 0.5 A

= 0 V, IS = 0.5 A,

/ dt = 100 A/µs

F

CA

θ

-- -- 1.4 V

-- 102 -- ns

(Note 4)

is determined by the user’s board design)

Rev. A, May 2004

Typical Characteristics

SSM1N45B

V

GS

Top : 15.0 V

10.0 V

8.0 V

6.0 V

5.5 V

0

5.0 V

10

Bottom : 4.5 V

, Drain Current [A]

D

I

-1

10

-1

10

0

10

Notes :

※

1. 250µ s Pulse Test

2. T

= 25

℃

C

1

10

VDS, Drain-Source Voltage [V]

VGS = 20V

VGS = 10V

※

Note : T

= 25

℃

J

12

10

8

6

[Ω ],

DS(ON)

R

4

2

Drain-Source On-Resistance

0

012345

ID, Drai n Current [A]

0

10

, Drain Current [A]

D

I

-1

10

246810

150

℃

25

℃

-55

℃

Notes :

※

1. VDS = 50V

2. 250µ s Pulse Test

VGS , Gate-Source Voltage [V]

Figure 2. Transfer CharacteristicsFigure 1. On-Region Charact er i st ics

0

10

150

℃

25

, Reverse Drain Current [A]

DR

I

-1

10

0.20.40.60.81.01.21.4

℃

Notes :

※

1. VGS = 0V

2. 250µ s Pulse Test

VSD, Source-Drain voltage [V]

Figure 3. On-Resistance Variation vs.

Drain Current and Gate Voltage

400

300

200

Capacitance [pF]

100

0

-1

10

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

C

iss

C

oss

C

rss

0

10

VDS, Drai n-Source Volt age [V]

C

= Cgs + Cgd (Cds = shorted)

iss

= Cds + C

C

oss

gd

C

= C

rss

gd

Note ;

※

1. VGS = 0 V

2. f = 1 MHz

1

10

Figure 4. Body Diode Forward Voltage

Variation with Source Current

and Temperature

12

10

8

6

4

, Gate-Source Voltage [V]

GS

2

V

0

01234567

QG, Total Gate Charge [nC]

VDS = 90V

VDS = 225V

VDS = 360V

Note : I※D = 0.5 A

Rev. A, May 2004

SSM1N45B

Typical Characteristics

1.2

1.1

1.0

, (Normalized)

DSS

BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 - 50 0 50 100 150 200

TJ, Junction Temperature [oC]

Figure 7. Breakdo w n Voltage Variation

vs. Temperature

Operation i n This Area

1

10

0

10

-1

10

, Drain Current [A]

D

I

-2

10

-3

10

0

10

is Limi ted by R

Notes :

※

1. TC = 25 oC

= 150 oC

2. T

J

3. Singl e Pulse

VDS, Drain-Source Voltage [V]

DS(on)

DC

1

10

(Continued)

Notes :

※

1. VGS = 0 V

2. I

100 µs

1 ms

10 ms

100 ms

1 s

2

10

= 250 µ A

D

3.0

2.5

2.0

1.5

, (Normalized)

1.0

DS(ON)

R

Drain-Source On-Resi stance

0.5

0.0

-100 -50 0 50 100 150 200

Notes :

※

1. VGS = 10 V

2. I

= 0.25 A

D

TJ, Junct ion Temperature [oC]

Figure 8. On-Resistance Variation

vs. Temperature

0.6

0.5

0.4

3

10

0.3

0.2

, Drain Current [A]

D

I

0.1

0.0 25 50 75 100 125 150

TC, Case Temperature [ ]

℃

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

2

10

D=0.5

1

0.2

10

0.1

0.05

0.02

0

10

0.01

(t), Thermal Response

JL

θ

Z

-1

10

-5

10

-4

10

single pulse

-3

10

t1, Square W ave Pulse Duration [sec]

P

DM

t

1

t

2

Notes :

※

1. Z

(t) = 50 /W M ax.

℃

θ JL

2. D uty F actor, D= t1/t

3. TJM - TL = PDM * Z

-2

-1

10

0

10

2

(t)

θ JL

1

2

10

3

10

Figure 11. Tr ans ient Ther m al Res pons e Cur ve

Rev. A, May 2004

12V

200nF

3mA

50KΩ

V

Gate Charge Test Circuit & Waveform

V

GS

300nF

Same Type

as DUT

DUT

V

DS

GS

10V

Resistive Switching Test Circuit & Waveforms

SSM1N45B

Q

g

Q

gs

Q

gd

Charge

10V

R

L

DUT

L

V

DD

V

DS

V

GS

R

G

V

DS

90%

10%

V

GS

t

d(on)tr

t

on

t

d(off)

t

f

t

off

Unclamped Inductive Switching Test Circuit & Waveforms

BV

DSS

L

LL

V

DS

BV

DSS

V

DSS

I

AS

DD

I

IDI

D

R

G

DUT

t

p

V

DD

1

----

E

=LI

E

=LI

AS

2

AS

I

(t)

D

t

p

DSS

--------------------

-------------------BV

BV

DSS-VDD

Time

V

(t)

V

(t)

DS

Rev. A, May 2004

Peak Diode Recovery dv /dt Test Circuit & Waveforms

+

DUT

I

SD

Driver

R

G

V

GS

+

V

DS

_

L

LL

Same Type

as DUT

• dv/dt controlled by R

•ISDcontrolled by pulse period

G

SSM1N45B

V

DD

V

GS

( Driver )

I

SD

( DUT )

V

DS

( DUT )

Gate Pulse Width

--------------------------

D =

Gate Pulse Period

IFM, Body Diode Forward Current

I

RM

Body Diode Reverse Current

Body Diode Recovery dv/dt

V

SD

Body Diode

Forward Voltage Drop

di/dt

10V

V

DD

Rev. A, May 2004

Package Dimensions

SSM1N45B

SOT-223

3.00 ±0.10

2.30 TYP

(0.95) (0.95)

4.60 ±0.25

0.70 ±0.10

MAX1.80

±0.20

1.75

±0.20

3.50 (0.60) (0.60)

0.25

+0.10 –0.05

0.08MAX

0.65 ±0.20

+0.04

0.06

–0.02

0°~10°

7.00 ±0.30

(0.46)

1.60 ±0.20

(0.89)

6.50 ±0.20

Dimensions in Millimeters

Rev. A, May 2004

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

A

CEx™ ActiveArray™ Bottomless™ CoolFET™

CROSSVOLT™

DOME™ EcoSPARK™

2

E

CMOS™ EnSigna™ FACT™ FACT Quiet Series™

Across the board. Around the world.™ The Power Franchise Programmable Active Droop™

®

FAST FASTr™ FPS™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™

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ImpliedDisconnect™

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OPTOPLANAR™ PACMAN™ POP™

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µSerDes™

SILENT SWITCHER SMART START™ SPM™ Stealth™

SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design

Preliminary First Production This datasheet contains preliminary data, and

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete Not In Production This datasheet contains specifications on a product

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Semiconductor reserves the right to make changes at any time without notice in order to improve design.

that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I11

Fairchild SSM1N45B service manual

Specifications and Main Features

Frequently Asked Questions

User Manual