High-voltage start-up
Low operating current (4mA)
Linearly decreasing PWM frequency to 22KHz
Frequency jittering to reduce EMI emission
Fixed PWM frequency (65KHz)
Peak-current-mode control
Cycle-by-cycle current limiting
Leading-edge blanking
Synchronized slope compensation
To minimize standby power consumption, a proprietary
green-mode function provides off-time modulation to
linearly decrease the switching frequency at light-load
conditions. To avoid acoustic noise problems, the
minimum PWM frequency is set above 22KHz. This
green-mode function enables the power supply to meet
international power conservation requirements. With the
internal high-voltage start-up circuitry, the power loss due
to bleeding resistors is eliminated. To further reduce power
consumption, SG6742 is manufactured using the BiCMOS
process, which allows an operating current of 4mA.
Internal open-loop protection
GATE output maximum voltage clamp (18V)
V
V
under-voltage lockout (UVLO)
DD
over voltage protection (OVP)
DD
Programmable over-temperature protection (RT)
Internal latch circuit (OVP, RT)
Constant power limit (full AC input range)
Internal OTP sensor with hysteresis
SG6742 integrates a frequency a hopping function that
helps reduce EMI emission of a power supply with
minimum line filters. Also, its built-in synchronized slope
compensation achieves stable peak-current-mode control.
The proprietary internal line compensation ensures
constant output power limit over a wide AC input voltages,
from 90V
to 264VAC.
AC
SG6742 provides many protection functions. In addition
APPLICATIONS
General-purpose switch-mode power supplies and
flyback power converters, including:
Power Adapters
Open-Frame SMPS
DESCRIPTION
to cycle-by-cycle current limiting, the internal open-loop
protection circuit ensures safety should an open-loop or
output short-circuit failure occur. PWM output is disabled
until V
controller starts up again. As long as V
drops below the UVLO lower limit when the
DD
exceeds about
DD
26V, the internal OVP circuit is triggered.
SG6742 is available in an 8-pin DIP or SOP package.
The highly integrated SG6742 series of PWM controllers
provides several features to enhance the performance of
flyback converters.
For start-up, the HV pin is connected to the line input or
bulk capacitor through an external diode and resistor R
HV
,
which are recommended as 1N4007 and 100KΩ. Typical
start-up current drawn from the HV pin is 1.2mA and it
charges the hold-up capacitor through the diode and
resistor. When the V
start-up current switches off. At this moment, the V
capacitor level reaches V
DD
DD-ON
, the
DD
capacitor only supplies the SG6742 to keep the VDD
before the auxiliary winding of the main transformer to
carry on provide the operating current.
Operating Current
Operating current is around 4mA. The low operating
current enables better efficiency and reduces the
requirement of V
hold-up capacitance.
DD
Green-Mode Operation
The patented green-mode function provides an off-time
modulation to reduce the switching frequency in
light-load and no-load conditions. The on-time is limited
for better abnormal or brownout protection. VFB, which is
derived from the voltage feedback loop, is taken as the
reference. Once V
is lower than the threshold voltage,
FB
switching frequency is continuously decreased to the
minimum green mode frequency, around 22KHz.
Current Sensing / PWM Current Limiting
Peak-current-mode control is utilized to regulate output
voltage and provide pulse-by-pulse current limiting. The
switch current is detected by a sense resistor into the
SENSE pin. The PWM duty cycle is determined by this
current sense signal and V
the voltage on the SENSE pin reaches around V
(V
–1.2)/4, a switch cycle is terminated immediately.
FB
V
is internally clamped to a variable voltage around
COMP
, the feedback voltage. When
FB
COMP
=
0.85V for output power limit.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on
spike occurs on the sense-resistor. To avoid premature
termination of the switching pulse, a leading-edge
blanking time is built in. During this blanking period, the
current-limit comparator is disabled and it cannot switch
off the gate driver.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off threshold are fixed internally at
16.5V/10.5V. During start-up, the hold-up capacitor must
be charged to 16.5V through the start-up resistor so that
IC is enabled. The hold-up capacitor continues to supply
V
before the energy can be delivered from auxiliary
DD
winding of the main transformer. V
must not drop
DD
below 10.5V during this start-up process. This UVLO
hysteresis window ensures that hold-up capacitor is
adequate to supply V
during start-up.
DD
Gate Output / Soft Driving
The SG6742 BiCMOS output stage is a fast totem pole
gate driver. Cross conduction is avoided to minimize heat
dissipation, increases efficiency, and enhances reliability.
The output driver is clamped by an internal 18V Zener
diode to protect power MOSFET transistors against
undesirable gate over voltage. A soft driving waveform is
implemented to minimize EMI.
Built-in Slope Compensation
The sensed voltage across the current-sense resistor is
used for peak-current-mode control and pulse-by-pulse
current limiting. Built-in slope compensation improves
stability or prevents sub-harmonic oscillation. SG6742
inserts a synchronized positive-going ramp at every
switching cycle.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor Rs,
reaches the threshold voltage, around 0.9V, the output
GATE drive is turned off after a small delay, t
delay introduces additional current, proportional to
t
/ LP. Since the delay is nearly constant, regardless
PD•VIN
of the input voltage V
, higher input voltage results in a
IN
larger additional current and the output power limit is
higher than under low input line voltage. To compensate
this variation for wide AC input range, a sawtooth
power-limiter is designed to solve the unequal
power-limit problem. The power limiter is designed as a
positive ramp signal and is fed to the inverting input of the
OCP comparator. This results in a lower current limit at
high-line inputs than at low-line inputs.
VDD over-voltage protection has been built in to prevent
damage due to abnormal conditions. Once the V
voltage is over the over-voltage protection voltage
(V
disabled until the V
then start-up again. Over-voltage conditions are usually
caused by open feedback loops.
) and lasts for t
DD-OVP
D-VDDOVP
voltage drops below the UVLO,
DD
, the PWM pulses are be
When VDD goes below the turn-off threshold (eg, 10.5V)
the controller is totally shut down. V
the turn-on threshold voltage of 16V through the start-up
DD
resistor until PWM output is restarted. This protection
is charged up to
DD
feature is activated as long as the over-loading condition
persists. This prevents the power supply from overheating
due to over loading conditions.
Noise Immunity
Thermal Protection
An NTC thermistor R
be connected from pin RT to ground. A constant current
I
is output from pin RT. The voltage on RT pin can be
RT
expressed as V
(1.3V / R
such that V
(V
), the PWM is turned off after 12ms (t
RTTH1
V
is less than 0.7V (V
RT
= IRT × (R
RT
). At high ambient temperature, R
I
decreases. When VRT is less than 1.05V
RT
immediately after 100µs (t
in series with a resistor RA can
NTC
+ Ra), in which IRT = 2 x
NTC
is smaller,
NTC
D-OTP1
), PWM should be turned off
RTTH2
).
D-OTP2
). If
Limited Power Control
The FB voltage increases every time the output of the
power supply is shorted or over-loaded. If the FB voltage
remains higher than a built-in threshold for longer than
t
, PWM output is turned off. As PWM output is
D-OLP
turned off, the supply voltage V
begins decreasing.
DD
Noise on the current sense or control signal may cause
significant pulse width jitter, particularly in
continuous-conduction mode. Slope compensation helps
alleviate this problem. Good placement and layout
practices should be followed. Avoiding long PCB traces
and component leads, locating compensation and filter
components near the SG6742, and increasing the power
MOS gate resistance improves performance.
1 0.101 0.2540.0040.010
b 0.4060.016
c 0.2030.008
D 4.648 4.9780.1830.196
E 3.810 3.9870.1500.157
e 1.016 1.2701.5240.0400.0500.060
F 0.381X45°0.015X45°
H 5.791 6.1970.2280.244
L 0.406 1.2700.0160.050
θ˚ 0° 8°0°8°