Fairchild SG6742DZ, SG6742SZ, SG6742DZ, SG6742SZ Schematic [ru]

Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
FEATURES
High-voltage start-up Low operating current (4mA) Linearly decreasing PWM frequency to 22KHz Frequency jittering to reduce EMI emission Fixed PWM frequency (65KHz) Peak-current-mode control Cycle-by-cycle current limiting Leading-edge blanking Synchronized slope compensation
To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency at light-load conditions. To avoid acoustic noise problems, the minimum PWM frequency is set above 22KHz. This green-mode function enables the power supply to meet international power conservation requirements. With the internal high-voltage start-up circuitry, the power loss due to bleeding resistors is eliminated. To further reduce power consumption, SG6742 is manufactured using the BiCMOS process, which allows an operating current of 4mA.
Internal open-loop protection GATE output maximum voltage clamp (18V) V V
under-voltage lockout (UVLO)
DD
over voltage protection (OVP)
DD
Programmable over-temperature protection (RT) Internal latch circuit (OVP, RT) Constant power limit (full AC input range) Internal OTP sensor with hysteresis
SG6742 integrates a frequency a hopping function that helps reduce EMI emission of a power supply with minimum line filters. Also, its built-in synchronized slope compensation achieves stable peak-current-mode control. The proprietary internal line compensation ensures constant output power limit over a wide AC input voltages, from 90V
to 264VAC.
AC
SG6742 provides many protection functions. In addition
APPLICATIONS
General-purpose switch-mode power supplies and flyback power converters, including:
Power Adapters Open-Frame SMPS
DESCRIPTION
to cycle-by-cycle current limiting, the internal open-loop protection circuit ensures safety should an open-loop or output short-circuit failure occur. PWM output is disabled until V controller starts up again. As long as V
drops below the UVLO lower limit when the
DD
exceeds about
DD
26V, the internal OVP circuit is triggered.
SG6742 is available in an 8-pin DIP or SOP package.
The highly integrated SG6742 series of PWM controllers provides several features to enhance the performance of flyback converters.
TYPICAL APPLICATION
© System General Corp. - 1 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
MARKING INFORMATION PIN CONFIGURATION
T: D = DIP, S = SOP
SG6742
XXXXXXXXYWWV
TP
P: Z =Lead Free
Null=regular package
XXXXXXXX: Wafer Lot Y
: Year; WW: Week
V
: Assembly Location
GND
FB
GATE
VDD
NC
HV
SENSE
RT
ORDERING INFORMATION
Part Number PWM Frequency Pb-Free Package
SG6742SZ 65KHz
SG6742DZ (Preliminary) 65KHz
SOP-8
DIP-8
PIN DESCRIPTIONS
Pin No. Symbol Function Description
1 GND Ground Ground.
2 FB Feedback
3 NC NA NC pin.
4 HV Start-up Input For start-up, this pin is pulled high to the line input or bulk capacitor via resistors.
5 RT
6 SENSE Current Sense
7 VDD Power Supply
8 GATE Driver Output The totem-pole output driver. Soft driving waveform is implemented for improved EMI.
Temperature
Detection
The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is
determined in response to the signal on this pin and the current-sense signal on SENSE pin.
For over-temperature protection, an external NTC thermistor is connected from this pin to GND
pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the RT
pin drops below a fixed limit, PWM output is disabled.
Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle
current limiting.
Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the
OVP trigger point.
© System General Corp. - 2 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
BLOCK DIAGRAM
© System General Corp. - 3 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDD Supply Voltage 30 V
VHV Input Voltage to HV Pin 500 V
VL Input Voltage to FB, SENSE, CS Pin -0.3 to 7.0 V
PD Power Dissipation TA < 50°C
Thermal Resistance (Junction-to-Air
R
Θ
JA
DIP
SOP 400
DIP 82.5
SOP 141.0
TJ Operating Junction Temperature -40 to +125 °C
T
Storage Temperature Range -55 to +150 °C
STG
T
L
ESD
Lead Temperature (Wave Soldering or Infrared, 10 Seconds) 260 °C
Electrostatic Discharge Capability, Human Body Model All pins except HV pin 4 KV
Electrostatic Discharge Capability, Machine Model All pins except HV pin 400 V
* All voltage values, except differential voltages, are given with respect to the GND pin.
* Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.
800
mW
°C/W
ELECTRICAL CHARACTERISTICS
VDD 󰦚 15V; TA 󰦚 25°C, unless otherwise noted.
VDD Section
Symbol Parameter Test Condition Min. Typ. Max. Unit
V
Continuously Operating Voltage 22 V
DD-OP
V
Start Threshold Voltage 15.5 16.5 17.5 V
DD-ON
V
Minimum Operating Voltage 9.5 10.5 11.5 V
DD-OFF
I
Start-up Current V
DD-ST
I
Operating Supply Current VDD = 15V, GATE open 4 5 mA
DD-OP
I
Internal Sink Current V
DD-OLP
V
I
TH-OLP
V
VDD Over-Voltage Protection 25 26 27 V
DD-OVP
t
VDD Over-Voltage Protection Debounce Time 75 125 200 µs
D-VDDOVP
Off Voltage 6.5 7.5 8.0 V
DD-OLP
– 0.16V 30 µA
DD-ON
+0.1V 50 70 90 µA
TH-O LP
HV Section
Symbol Parameter Test Condition Min. Typ. Max. Unit
IHV Supply Current Drawn from HV Pin
I
Leakage Current After Start-up
HV-LC
VAC=90V (VDC=120V)󰦘
V
=10µF
DD
HV = 500V,
VDD = V
DD-OFF
+1V
1.2
mA
1 20 µA
© System General Corp. - 4 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
Oscillator Section
Symbol Parameter Test Condition Min. Typ. Max. Unit
F
Frequency in Nominal Mode
OSC
t
Hopping Period 4.4 ms
HOP
F
Green-Mode Frequency 18 22 25 KHz
OSC-G
FDV Frequency Variation vs. VDD Deviation VDD=11V to 22V 5 %
FDT Frequency Variation vs. Temp. Deviation TA=-20 to 85°C 5 %
* Hopping off at green-mode.
Center Frequency 62 65 68
Hopping Range ±3.7 ±4.2 ±4.7
KHz
Feedback Input Section
Symbol Parameter Test Condition Min. Typ. Max. Unit
AV Input Voltage to Current-Sense Attenuation 1/4.5 1/4.0 1/3.5 V/V
ZFB Input Impedance 4 7 k
V
Output High Voltage FB pin open 5.5 V
FB-OPEN
V
FB Open-Loop Trigger Level
FB-OLP
t
Delay Time of FB Pin Open Loop Protection 53 56 59 ms
D-OLP
V
Green-Mode Entry FB Voltage 1.9 2.1 2.3 V
FB-N
V
Green-Mode Ending FB Voltage V
FB-G
5.0 5.2 5.4 V
-0.5 V
FB-N
PWM Frequency
F
OSC
F
OSC-G
V
V
FB-G
V
FB-N
FB
© System General Corp. - 5 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
Current-Sense Section
Symbol Parameter Test Condition Min. Typ. Max. Unit
Z
Input Impedance 12 K
SENSE
V
Current Limit Flatten Threshold Voltage 0.87 0.90 0.93 V
STHFL
V
Current Limit Valley Threshold Voltage V
STHVA
STHFL–VSTHVA
0.18 0.22 0.26 V
tPD Delay to Output 100 200 ns
t
Leading-Edge Blanking Time 275 350 425 ns
LEB
V
S-SCP
t
D-SSCP
Threshold Voltage for SENSE Short-circuit
Protection
Delay Time for SENSE Short-circuit
Protection
0.10 0.15 0.20 V
V
< 0.15V 100 150 200 µs
SENSE
GATE Section
Symbol Parameter Test Condition Min. Typ. Max. Unit
DCY
Maximum Duty Cycle 60 65 70 %
MAX
V
Gate Low Voltage VDD=15V, IO=50mA 1.5 V
GATE-L
V
Gate High Voltage VDD=12V, IO=50mA 8 V
GATE-H
tr Gate Rising Time VDD=15V, CL=1nF 150 250 350 ns
tf Gate Falling Time VDD=15V, CL=1nF 30 50 90 ns
I
GATE-SOURCE
V
GATE-CLAMP
Gate Source Current VDD=15V, GATE=6V 250 mA
Gate Output Clamping Voltage VDD=22V 18 V
RT Section
Symbol Parameter Test Condition Min. Typ. Max. Unit
IRT Output Current from the RT Pin 92 100 108 µA
V
RTTH1
V
RTTH2
t
D-OTP1
t
D-OTP2
Over-Temperature Protection Threshold
Voltage
Over-Temperature Protection Threshold
Voltage
Over-Temperature Latch-off Debounce V
Over-Temperature Latch-off Debounce VRT < V
0.7V 󰦙 VRT 󰦙 1.05V, after
12ms latch off
󰦙 0.7V, after 100µs
V
RT
latch off
󰦙 V
RTTH2
󰦙 V
RT
60 100 140 µs
RTTH2
8 12 16 ms
RTTH1
1.015 1.050 1.085 V
0.65 0.70 0.75 V
Over Temperature Protection (OTP)
Symbol Parameter Test Condition Min. Typ. Max. Unit
T
Protection Junction Temperature* 135 °C
OTP
T
Restart Junction Temperature** T
Restart
* When activated, the output is disabled and the latch is turned off.
** This is the threshold temperature for enabling the output again and resetting the latch after over-temperature protection has
been activated.
-25 °C
OTP
© System General Corp. - 6 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
TYPICAL CHARACTERISTICS
Start-u p Current (I
25
20
15
(uA)
10
DD_ST
I
5
0
-40 -30 -15 0 25 50 75 8 5 100 125
) vs Temperature
DD-S T
Temperature (℃)
Start Threshold Voltage (V
20
19
18
(V)
DD-ON
17
V
16
) vs Temperature)
DD-ON
Operating Supply Current (I
5
4
3
(mA)
2
DD-OP
I
1
0
-40 -30 - 15 0 25 50 75 85 100 125
Temperature (℃)
) vs Temperature
DD-OP
Minimum Operating Voltage (V
13
12
11
(V)
DD-OFF
10
V
9
) vs Temperature
DD-OFF
15
-40 -30 - 15 0 25 50 75 85 100 125
Temperature (℃)
Supply current drawn from pin HV (IHV) vs Temperature
5
4
3
(mA)
HV
I
2
1
0
-40 -30 - 15 0 25 50 75 85 100 125
Temperature (℃)
8
-40 -30 - 15 0 25 50 75 85 100 125
Temperature (℃)
HV pin Leakage Current after Start-up (I
10
8
6
(uA)
4
HV-LC
I
2
0
-40 -30 - 15 0 25 50 75 85 100 125
Temperature (℃)
) vs Temperature
HV-LC
© System General Corp. - 7 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
Frequency in nominal mode (F
70
) vs Temperature
OSC
Maximum Duty Cycle (DCY
70
) vs Temperature
MAX
68
66
(kHz)
OSC
64
F
62
60
-40 -30 - 15 0 25 50 75 85 100 125
Temperature (℃)
Outpu t Current fro m the RT pin (IRT) vs Temperature
104
102
100
(uA)
RT
I
98
96
94
-40 -30 -15 0 25 50 75 8 5 100 125
Temperature (℃)
68
66
(%)
MAX
64
DCY
62
60
-40 -30 - 15 0 25 50 75 85 100 125
Temperature (℃)
© System General Corp. - 8 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
OPERATION DESCRIPTION
Start-up Current
For start-up, the HV pin is connected to the line input or bulk capacitor through an external diode and resistor R
HV
, which are recommended as 1N4007 and 100K. Typical start-up current drawn from the HV pin is 1.2mA and it charges the hold-up capacitor through the diode and resistor. When the V start-up current switches off. At this moment, the V
capacitor level reaches V
DD
DD-ON
, the
DD
capacitor only supplies the SG6742 to keep the VDD before the auxiliary winding of the main transformer to carry on provide the operating current.
Operating Current
Operating current is around 4mA. The low operating current enables better efficiency and reduces the requirement of V
hold-up capacitance.
DD
Green-Mode Operation
The patented green-mode function provides an off-time modulation to reduce the switching frequency in light-load and no-load conditions. The on-time is limited for better abnormal or brownout protection. VFB, which is derived from the voltage feedback loop, is taken as the reference. Once V
is lower than the threshold voltage,
FB
switching frequency is continuously decreased to the minimum green mode frequency, around 22KHz.
Current Sensing / PWM Current Limiting
Peak-current-mode control is utilized to regulate output voltage and provide pulse-by-pulse current limiting. The switch current is detected by a sense resistor into the SENSE pin. The PWM duty cycle is determined by this current sense signal and V the voltage on the SENSE pin reaches around V (V
–1.2)/4, a switch cycle is terminated immediately.
FB
V
is internally clamped to a variable voltage around
COMP
, the feedback voltage. When
FB
COMP
=
0.85V for output power limit.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike occurs on the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled and it cannot switch off the gate driver.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off threshold are fixed internally at
16.5V/10.5V. During start-up, the hold-up capacitor must be charged to 16.5V through the start-up resistor so that IC is enabled. The hold-up capacitor continues to supply V
before the energy can be delivered from auxiliary
DD
winding of the main transformer. V
must not drop
DD
below 10.5V during this start-up process. This UVLO hysteresis window ensures that hold-up capacitor is adequate to supply V
during start-up.
DD
Gate Output / Soft Driving
The SG6742 BiCMOS output stage is a fast totem pole gate driver. Cross conduction is avoided to minimize heat dissipation, increases efficiency, and enhances reliability. The output driver is clamped by an internal 18V Zener diode to protect power MOSFET transistors against undesirable gate over voltage. A soft driving waveform is implemented to minimize EMI.
Built-in Slope Compensation
The sensed voltage across the current-sense resistor is used for peak-current-mode control and pulse-by-pulse current limiting. Built-in slope compensation improves stability or prevents sub-harmonic oscillation. SG6742 inserts a synchronized positive-going ramp at every switching cycle.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor Rs, reaches the threshold voltage, around 0.9V, the output GATE drive is turned off after a small delay, t delay introduces additional current, proportional to t
/ LP. Since the delay is nearly constant, regardless
PD•VIN
of the input voltage V
, higher input voltage results in a
IN
larger additional current and the output power limit is higher than under low input line voltage. To compensate this variation for wide AC input range, a sawtooth power-limiter is designed to solve the unequal power-limit problem. The power limiter is designed as a positive ramp signal and is fed to the inverting input of the OCP comparator. This results in a lower current limit at high-line inputs than at low-line inputs.
. This
PD
© System General Corp. - 9 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
VDD Over-Voltage Protection
VDD over-voltage protection has been built in to prevent damage due to abnormal conditions. Once the V voltage is over the over-voltage protection voltage (V disabled until the V then start-up again. Over-voltage conditions are usually caused by open feedback loops.
) and lasts for t
DD-OVP
D-VDDOVP
voltage drops below the UVLO,
DD
, the PWM pulses are be
When VDD goes below the turn-off threshold (eg, 10.5V) the controller is totally shut down. V the turn-on threshold voltage of 16V through the start-up
DD
resistor until PWM output is restarted. This protection
is charged up to
DD
feature is activated as long as the over-loading condition persists. This prevents the power supply from overheating due to over loading conditions.
Noise Immunity
Thermal Protection
An NTC thermistor R be connected from pin RT to ground. A constant current I
is output from pin RT. The voltage on RT pin can be
RT
expressed as V (1.3V / R such that V (V
), the PWM is turned off after 12ms (t
RTTH1
V
is less than 0.7V (V
RT
= IRT × (R
RT
). At high ambient temperature, R
I
decreases. When VRT is less than 1.05V
RT
immediately after 100µs (t
in series with a resistor RA can
NTC
+ Ra), in which IRT = 2 x
NTC
is smaller,
NTC
D-OTP1
), PWM should be turned off
RTTH2
).
D-OTP2
). If
Limited Power Control
The FB voltage increases every time the output of the power supply is shorted or over-loaded. If the FB voltage remains higher than a built-in threshold for longer than t
, PWM output is turned off. As PWM output is
D-OLP
turned off, the supply voltage V
begins decreasing.
DD
Noise on the current sense or control signal may cause significant pulse width jitter, particularly in continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the SG6742, and increasing the power MOS gate resistance improves performance.
© System General Corp. - 10 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
REFERENCE CIRCUIT (12V/5A)
F1
CN1
1 2 3
CN1
L1
1 2
3 4
T1
C1
1 2
3 4
VZ1
C2
21
D4
2
BD1
4
C3
1
21
+
3
R1
C5
C4
D2
2 1
T2
4
5
6 2
3 7
8
C6R2
1
2
3
Q1
21
+
1 2
C7
VO+
L2
21
+
C8
1 2
VO+
L3
D1
3 4
2 1
VO-
R3
R4
D3
21
21
SG6742
U1
1
2
C12
3
GND
FB
NC
HV4RT
8
GATE
7
VDD
6
SENSE
5
+
C9
R6
C10
THER1
43
23
Q2
1
R5
R7
12
R8
U2
R9
R
U3
A K
VO+
R10
C11
R11
BOM
Reference Component Reference Component
BD1 BD 4A/600V Q1 STP20-100CT
C1 XC 0.68µF/300V Q2 MOS 7A/600V
C2 XC 0.1µF/300V R1 R 100Kohm 1/2W
C3 YC 222pF/Y1 R2 R 47ohm 1/4W
C4 EC 120µF/400V R3 R 100Kohm 1/2W
C5 CC 0.01µF/500V R4 R 20ohm 1/8W
C6 CC 102pF/100V R5 R 100ohm 1/8W
C7 EC 1000µF/25V R6 R 4.7Kohm 1/8W
C8 EC 470µF/25V R7 R 0.3ohm 2W
C9 EC 22µF/50V R8 R 680ohm 1/8W
C10 CC 470pF/50V R9 R 4.7Kohm 1/8W
C11 CC 222pF/50V R10 R 150Kohm 1/8W
C12 CC 103pF/50V R11 R 39Kohm 1/8W
D1 Zener Diode 15V 1/2W (option) THER1 Thermistor TTC104
D2 BYV95C T1 10mH
D3 FR103 T2 600µH(PQ2620)
D4 1N4007 U1 IC SG6742
F1 FUSE 4A/250V U2 IC PC817
L1 Inductor (900µH) U3 IC TL431
L2 Inductor (2µH) VZ1 VZ 9G
L3 Inductor (900µH)
© System General Corp. - 11 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
PACKAGE INFORMATION
8PINS-DIP(D)
D
¢X
85
Θ
Dimensions
E1
1
4
A2
A1
L
b1
e
b
Symbol
A 5.334 0.210
A1 0.381 0.015
A2 3.175 3.302 3.429 0.125 0.130 0.135
b 1.524 0.060
b1 0.457 0.018
D 9.017 9.271 10.160 0.355 0.365 0.400
E 7.620 0.300
E1 6.223 6.350 6.477 0.245 0.250 0.255
e 2.540 0.100
L 2.921 3.302 3.810 0.115 0.130 0.150
eB 8.509 9.017 9.525 0.335 0.355 0.375
θ˚ 0˚ 7˚ 15˚ 0˚ 7˚ 15˚
Millimeters Inches Min. Typ. Max. Min. Typ. Max.
E
A
eB
© System General Corp. - 12 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
yp
A
A
Highly Integrated Green-Mode PWM Controller SG6742
8PINS-SOP(S)
8
5
C
Dimensions
E
1
b
4
e
D
H
F
Θ
A
A1
Symbol
1.346 1.752 0.053 0.069
1 0.101 0.254 0.004 0.010 b 0.406 0.016 c 0.203 0.008 D 4.648 4.978 0.183 0.196 E 3.810 3.987 0.150 0.157 e 1.016 1.270 1.524 0.040 0.050 0.060 F 0.381X45° 0.015X45° H 5.791 6.197 0.228 0.244 L 0.406 1.270 0.016 0.050 θ˚ 0° 8° 0° 8°
Millimeter Inch Min. T
.Max.Min. Typ.Max.
L
© System General Corp. - 13 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller SG6742
© System General Corp. - 14 - www.sg.com.tw • www.fairchildsemi.com Version 1.0.1 (IAO33.0083.B0) September 24, 2007
Loading...