Fairchild RFG70N06, RF1S70N06, RFP70N06 service manual

RFG70N06, RFP70N06, RF1S70N06,

Data Sheet February 2005

RF1S70N06SM

70A, 60V, 0.014 Ohm, N-Channel Power MOSFETs

These are N-Channel power MOSFETs manu factured using the MegaFET process. This proces s, which uses feature sizes approaching those of LSI circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching re gulators , s witch ing con v erters, motor driv ers and relay driv ers. These tr ansistor s can be operated directly from integrated circuits.

Formerly developmental type TA78440.

Ordering Information

PART NUMBER PACKAGE BRAND

RFG70N06 TO-247 RFG70N06 RFP70N06 TO-220AB RFP70N06 RF1S70N06 TO-262AA F1S70N06 RF1S70N06SM TO-263AB F1S70N06

NOTE: When ordering use the entire part number . Add the suffix 9A to obtain the T O-263AB variant in tape and reel, e. g. RF1 S70N0 6SM9A.

Features

• 70A, 60V

•r

• Temperature Compensated PSPICE

DS(on)

= 0.014Ω

®

Model

• Peak Current vs Pulse Width Curve

• UIS Rating Curve (Single Pulse)

o

•175

C Operating Temperature

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”

Symbol

D

G

S

Packaging

DRAIN

(BOTTOM

SIDE METAL)

DRAIN

(FLANGE)

JEDEC STYLE TO-247

JEDEC TO-220AB

SOURCE

DRAIN

GATE

SOURCE

DRAIN

(FLANGE)

JEDEC TO-263AB

JEDEC TO-262AA

DRAIN

(FLANGE)

SOURCE

DRAIN

GATE

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

RFG70N06, RFP70N06

RF1S70N06, RF1S70N06SM UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (R

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . .V

GS

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Cu rrent (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Single Pulse Avalanche R a ting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

DSS

DGR

DM

GS

AS

D

Refer to Pea k Current Curve

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “A bsolute Maximu m Rating s” may cause per manent d amage to t he device. This is a str ess on ly rating and operation o f the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

, T

J

STG

L

pkg

60 V 60 V 70

±20 V

Refer to UIS Curve A

150

1.0

W/oC

-55 to 175

300 260

A

W

o

C

o

C

o

C

NOTE:

= 25oC to 150oC.

1. T

J

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV Gate Threshold Voltage V

GS(TH)

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I Drain to Source On Resistance (Note 2) r

DS(ON)

Turn-On Time t Turn-On Delay Time t

d(ON)

Rise Time t Turn-Off Delay Time t

d(OFF)

Fall Time t Turn-Off Time t Total Gate Charge Q

(OFF) g(TOT)

Gate Charge at 10V Q Threshold Gate Charge Q Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Thermal Resistance, Junction to Case R Thermal Resistance, Junction to Ambient R

DSS

GSS

(ON)

r

f

g(10)

g(TH)

ISS OSS RSS

θJC

θJA

ID = 250µA, VGS = 0V (Figure 11) 60 - - V VGS = VDS, ID = 250µA (Figure 10) 2 - 4 V VDS = 60V, VGS = 0V - - 1 µA V

= 0.8 x Rated BV

DS

, TC = 150oC--25µA

DSS

VGS = ±20V - - ±100 nA ID = 70A, VGS = 10V (Figure 9) - - 0.014 Ω VDD = 30V, ID ≈ 70A, RL = 0.43Ω,

V

= 10V, RGS = 2.5Ω

GS

(Figure 13)

- - 190 ns

-10- ns

- 137 - ns

-32- ns

-24- ns

- - 73 ns

VGS = 0V to 20V VDD = 48V, ID = 70A,

R

= 0.68Ω

VGS = 0V to 10V - 65 85 nC VGS = 0V to 2V - 5.0 6.5 nC

L

= 2.2mA

I

g(REF)

(Figure 13)

VDS = 25V, VGS = 0V, f = 1MHz (Figure 12)

- 120 156 nC

- 2250 - pF

- 792 - pF

- 206 - pF

--1.0oC/W TO-220 and TO-263 - - 62 TO-247 - - 30

o o

C/W C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V Reverse Recovery Time t

SD

rr

NOTES:

2. Pulse test: pulse width ≤ 300ms, duty cycle ≤ 2%.

3. Repetitive rating: pulse width is limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3) and Peak Current Capability Curve (Figure 5).

ISD = 70A - 1.5 V ISD = 70A, dISD/dt = 100A/µs - 52 ns

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

Typical Performance Curves T

C

= 25

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 175

125

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED PO WER DISSIP ATION vs CASE

TEMPERATURE

1

0.5

o

C, Unless Otherwise Specified

, DRAIN CURRENT (A)

D

I

150

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

80

70

60

50

40

30

20

10

0

25 50 75 100

TC, CASE TEMPERATURE (oC)

CASE TEMPERATURE

125

150

175

0.1

, NORMALIZED

JC

θ

Z

THERMAL IMPEDANCE

0.01

500

100

OPERATION IN THIS AREA MAY BE

10

LIMITED BY r

, DRAIN CURRENT (A)

D

I

T

= 25oC

C

T

= MAX RATED

J

SINGLE PULSE

1

0.2

0.1

0.05

0.02

0.01 SINGLE PULSE

-5

10

-4

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

DS(ON)

10

VDS, DRAIN TO SOURCE VOLTAGE (V)

-3

10

-2

10

t, RECTANGULAR PULSE DURATION (s)

1000

100µs

1ms

10ms

100

, PEAK CURRENT (A) I

DM

100

50

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

10

VGS = 10V

TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION

-5

10

-4

10

P

DM

θ

10

TC = 25oC

FOR TEMPERAT URES ABOVE 25 CURRENT AS FOLLOWS:

=

II

-3

10

t, PULSE WIDTH (s)

-2

10

t

1

t

2

1/t2

x R

JC

0

o

+ T

JC

C

θ

C DERATE PEAK

175 T

–

 

25



10

------------------ ----150

-1

C

10

1

10

0

1

10

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

Typical Performance Curves T

300

100

, AVALANCHE CURRENT (A)

STARTING TJ = 150oC

AS

I

10

0.01

If R = 0 tAV = (L)(IAS)/(1.3*RATED BV

If R ≠ 0 t

= (L/R) ln [( IAS*R)/(1.3*RATED BV

AV

STARTING TJ = 25oC

0.1

tAV, TIME IN AVALANCHE (ms)

DSS

1

o

= 25

C, Unless Otherwise Specified (Continued)

C

- VDD) ) +1]

DSS-VDD

NOTE: Refer to Fairc hild Application Notes AN9321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

200

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

= 15V

V

DD

160

-55oC

25oC

175oC

200

160

120

80

, DRAIN CURRENT (A)

D

I

40

0

10

0123 5

= 20V

V

GS

V

= 10V

GS

VDS, DRAIN TO SOURCE VOLTAGE (V)

= 8V

V

GS

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

= 25oC

T

C

= 7V

V

GS

VGS = 6V

V

= 5V

GS

= 4.5V

V

GS

4

FIGURE 7. SATURATION CHARACTERISTICS

2.5

PULSE DURATION = 250µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 70A

2

120

80

40

, DRAIN TO SOURCE CURRENT (A)

DS(ON)

I

0

0468102

VGS, GATE TO SOURCE VOLTAGE (V)

1.5

1

ON RESIST ANCE

0.5

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)

FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO S OURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

2.0 VGS = VDS, ID = 250µA

1.5

1.0

NORMALIZED GATE

0.5

THRESHOLD VOLTAGE

0

-80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)

200

2.0 ID = 250µA

1.5

1.0

0.5

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 160 T

, JUNCTION TEMPERATURE (oC)

J

200

FIGURE 10. NORMALIZED GATE THRESHOLD VOLT AGE vs

JUNCTION TEMPERATURE

FIGURE 11. NORMALIZED DRAIN T O SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

Typical Performance Curves T

o

= 25

C, Unless Otherwise Specified (Continued)

C

5000

VGS = 0V, f = 1MHz

4000

ISS

C

= C

RSS

C

≈ CDS + C

C

ISS

OSS

GD

C

= CGS + C

3000

2000

C

C, CAPACITANCE (pF)

1000

0

0 5 10 15 20

OSS

C

RSS

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLT AGE

Test Circuits and Waveforms

V

DS

L

TO OBTAIN

VARY t

P

REQUIRED PEAK I

V

GS

AS

R

G

DUT

+

-

GS

60

VDD = BV

45

DSS

VDD = BV

DSS

10

7.5

RL = 0.86Ω

= 2.2mA

I

30

15

G(REF)

V

GS

0.75 BV

0.50 BV

0.25 BV

= 10V

DSS DSS DSS

, DRAIN TO SOURCE VOLTAGE (V)

DS

V

25

0

20

I

G(REF)

I

G(ACT)

t, TIME (µs)

80

I

G(REF)

I

G(ACT)

5

2.5

0

, GATE TO SOURCE VOLTAGE (V)

GS

V

NOTE: Refer to Fairc hild Application Notes AN725 4 and AN7260.

FIGURE 13. NORMALIZED SWITCHI NG W A VEFORMS FOR

CONSTANT GATE CURRENT

BV

DSS

t

P

I

AS

V

DD

V

DS

V

DD

0V

P

I

AS

0.01Ω

0

t

AV

t

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

t

ON

t

10%

d(ON)

90%

50%

t

10%

r

PULSE WIDTH

V

DS

V

DS

R

DUT

L

+

V

DD

-

0

V

GS

0

V

GS

R

GS

V

GS

t

d(OFF)

90%

FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. SWITCHING WAVEFORMS

t

OFF

50%

t

f

90%

10%

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

Test Circuits and Waveforms (Continued)

V

DS

R

L

V

I

g(REF)

GS

DUT

+

V

-

DD

V

DD

V

0

I

g(REF)

0

GS

V

GS

= 2V

Q

g(TH)

g(10)

Q

g(TOT)

V

DS

VGS = 10V

V

= 20V

GS

FIGURE 18. GATE CHARGE TEST CIRCUIT

FIGURE 19. GATE CHARGE WAVEFORM

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

PSPICE Electrical Model

.SUBCKT RFG70N06 2 1 3 ; rev 3/20/92

CA 12 8 5.56e-9 CB 15 14 5.30e-9 CIN 6 8 2.63e-9

DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD

EBREAK 11 7 17 18 65.18 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1

IT 8 17 1

LDRAIN 2 5 1e-9 LGATE 1 9 3.10e-9 LSOURCE 3 7 1.82e-9

MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01

RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 4.66e-3 RLDRAIN 2 5 10 RGATE 9 20 1.21 RLGATE 1 9 31 RIN 6 8 1e9 RSOURCE 8 7 RDSMOD 3.92e-3 RLSOURCE 3 7 18.2 RVTO 18 19 RVTOMOD 1

RLGATE

GATE

1

LGATE

9

RGATE

10

-

6

ESG

8

+

EVTO

20

+

18

8

S1A

12

S1B

CA CB

-

RIN CIN

13814

13

+

6

EGS

8

6

13

--

DPLCAP

VTO

-

S2A

15

S2B

EDS

RLDRAIN

5

LDRAIN

RSCL1RSCL2

+

51

5

ESCL

51

50 RDRAIN

16

+

21

MOS1

14

+

5 8

8

DBREAK

EBREAK

MOS2

RSOURCE

11

17

+

17 18

-

7

RBREAK

IT

DBODY

RLSOURCE

LSOURCE

2

DRAIN

3

SOURCE

18

RVTO

19

VBAT

+

S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD

VBAT 8 19 DC 1 VTO 21 6 0.605

.MODEL DBDMOD D (IS = 7.91e-12 RS = 3.87e-3 TRS1 = 2.71e-3 TRS2 = 2.50e-7 CJO = 4.84e-9 TT = 4.51e-8) .MODEL DBKMOD D (RS = 3.9e-2 TRS1 =1.05e-4 TRS2 = 3.11e-5) .MODEL DPLCAPMOD D (CJO = 4.8e-9 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 3.46 KP = 47 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 8.46e-4 TC2 = -8.48e-7) .MODEL RDSMOD RES (TC1 = 2.23e-3 TC2 = 6.56e-6) .MODEL RVTOMOD RES (TC1 = -3.29e-3 TC2 = 3.49e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -8.35 VOFF= -6.35) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.35 VOFF= -8.35) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.0 VOFF= 3.0) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.0 VOFF= -2.0)

.ENDS

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley.

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ ActiveArray™ Bottomless™

FPS™

CoolFET™ CROSSVOL T™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™

Across the board. Around the world.™ The Power Franchise Programmable Active Droop™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE T O ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT

CONVEY ANY LICENSE UNDER ITS PA TENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY



FAST FASTr™

LittleFET™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™



IntelliMAX™ ISOPLANAR™

MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC



OPTOPLANAR™ P ACMAN™

POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench



QFET



QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART ST ART™

SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET



UniFET™ VCX™



FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or In Design

First Production

Full Production

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I15

Fairchild RFG70N06, RF1S70N06, RFP70N06 service manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Data Sheet February 2005

Features

Packaging

JEDEC STYLE TO-247

JEDEC TO-220AB

JEDEC TO-263AB

JEDEC TO-262AA

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

Refer to Pea k Current Curve

Refer to UIS Curve A

W/oC

-55 to 175

VGS = ±20V - - ±100 nA ID = 70A, VGS = 10V (Figure 9) - - 0.014 Ω VDD = 30V, ID ≈ 70A, RL = 0.43Ω,

- 2250 - pF

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM

RFG70N06, RFP70N06, RF1S70N06, RF1S70N06SM