Fairchild RC4200 service manual
查询RC4200供应商
RC4200
Analog Multiplier
www.fairchildsemi.com
Features
• High accuracy
• Nonlinearity – 0.1%
Temperature coefficient – 0.005%/°C
• Multiple functions
• Multiply, divide, square, square root, RMS-to-DC
conversion, AGC and modulate/demodulate
• Wide bandwidth – 4 MHz
• Signal-to-noise ratio – 94 dB
Applications
• Low distortion audio modulation circuits
• Voltage-controlled active filters
• Precision oscillators
Description
The RC4200 analog multiplier has complete compensation
for nonlinearity, the primary source of error and distortion.
This multiplier also has three onboard operational amplifiers
designed specifically for use in multiplier logging circuits.
These amplifiers are frequency compensated for optimum
AC response in a logging circuit, the heart of a multiplier,
and can therefore provide superior AC response.
The RC4200 can be used in a wide variety of applications
without sacrificing accuracy. Four-quadrant multiplication,
two-quadrant division, square rooting, squaring and RMS
conversion can all be easily implemented with predictable
accuracy. The nonlinearity compensation is not just trimmed
at a single temperature, it is designed to provide compensation over the full temperature range. This nonlinearity
compensation combined with the low gain and offset drift
inherent in a well-designed monolithic chip provides a very
high accuracy and a low temperature coefficient.
Block Diagram
V
OS2
I
2
–
+
I
3
RC4200
Q2
Q3
Q1
–
+
+
–
Q4
65-4200-01
I
V
I
1
OS1
4
REV. 1.2.1 6/14/01
RC4200 PRODUCT SPECIFICATION
V
BEN
kT
Q
-------
In
I
CN
I
SN
---------
2()=
Functional Description
The RC4200 multiplier is designed to multiply two input
currents (I1 and I2) and to divide by a third input current (I4).
The output is also in the form of a current (I
circuit diagram is shown in the Block Diagram. The nominal
relationship between the three inputs and the output is:
I1I
2
---------
I
3
1()=
I
4
The three input currents must be positive and restricted to a
range of 1 µA to 1 mA. These currents go into the multiplier
chip at op amp summing junctions which are nominally at
zero volts. Therefore, an input voltage can be easily
converted to an input current by a series resistor. Any
number of currents may be summed at the inputs. Depending
on the application, the output current can be converted to a
voltage by an external op amp or used directly. This capabilty of combining input currents and voltages in various
combinations provides great versatility in application.
Inside the multiplier chip, the three op amps make the
collector currents of transistors Q1, Q2 and Q4 equal to their
respective input currents (I
, I2, and I4). These op amps are
1
designed with current source outputs and are phase-compensated for optimum frequency response as a multiplier. Power
drain of the op amps was minimized to prevent the introduction of undesired thermal gradients on the chip. The three op
amps operate on a single supply voltage (nominally -15V)
and total quiescent current drain is less than 4 mA. These
special op amps provide significantly improved performance
in comparison to 741-type op amps.
The actual multiplication is done within the log-antilog
configuration of the Q1-Q4 transistor array. These four
transistors, with associated proprietary circuitry, were
specially designed to precisely implement the relationship.
). A simplified
3
Previous multiplier designs have suffered from an additional
undesired linear term in the above equation; the collector
current times the emitter resistance. The I
term intro-
CrE
duces a parabolic nonlinearity even with matched transistors.
Fairchild Semiconductor has developed a unique and proprietary means of inherently compensating for this undesired
ICrE term. Furthermore, this Fairchild Semiconductor developed circuit technique compensates linearity error over temperature changes. The nonlinearity versus temperature is
significantly improved over earlier designs.
From equation (2) and by assuming equal transistor junction
temperatures, summing base-to-emitter voltage drops around
the transistor array yields:
KT
-------q
In
I
------I
S1
I
1
-------
In
I
S2
I
2
-------
In
I
3
In
––= 0 3()=
S3
I
------I
4
S4
This equation reduces to:
I1I
---------
I3I
The rate of reverse saturation current I
IS1I
--------------IS3I
S2
S4
4()=
S1IS2/IS3IS4
, depends
2
4
on the transistor matching. In a monolithic multiplier this
matching is easily achieved and the rate is very close to
unity, typically 1.0±1%. The final result is the desired
relationship:
I1I
2
---------
I
3
5()=
I
4
The inherent linearity and gain stability combined with low
cost and versatility makes this new circuit ideal for a wide
range of nonlinear functions.
Pin Assignments
I
1
2
V
2
OS2
–V
3
S
I3 (Output)
4
65-4200-07
2 REV. 1.2.1 6/14/01
I
8
1
V
7
OS1
GND
6
I
5
4
PRODUCT SPECIFICATION RC4200
Absolute Maximum Ratings
Parameter Min. Max. Unit
Supply Voltage
1
-22 V
Input Current -5 mA
Storage Temperature Range RC4200/4200A -55 +125 °C
Operating Temperature Range RC4200/4200A 0 +70 °C
Notes:
1. For a supply voltage greater than -22V, the absolute maximum input voltage is equal to the supply voltage.
2. Observe package thermal characteristics.
Thermal Characteristics
(Still air, soldered into PC board)
8-Lead Plastic DIP 8-Lead SOIC
Maximum Junction Temperature +125°C +125˚C
Maximum P
Thermal Resistance θ
Thermal Resistance θ
For TA > 50°C Derate at 6.25mW/°C 4.17mW/˚C
< 50°C 468mW 300mW
D TA
JC
JA
——
160°C/W 240˚C/W
Electrical Characteristics
(Over operating temperature range, VS = -15V unless otherwise noted)
4200A 4200
Parameters Test Conditlons
Total Error as Multiplier TA = +25°C
Untrimmed
With External Trim ±0.2 ±0.2 %
Versus Temperature ±0.005 ±0.005 %/°C
Versus Supply (-9 to -18V) ±0.1 ±0.1 %/V
Nonlinearity
2
50µA ≤ I
1,2,4
≤ 250 µA,
TA = +25°C
Input Current Range
(I1, I2 and I4)
Input Offset Voltage I1 = I2 = I4 = 150 µA
TA = +25°C
Input Bias Current I1 = I2 = I4 = 150 µA
TA = +25°C
Average Input Offset
I1 = I2 = I4 = 150 µA ±50 ±100 µV/°C
Voltage Drift
Output Current Range (I3)
3
Min. Typ. Max. Min. Typ. Max. Units
1
1.0 1000 1.0 1000 µA
1.0 1000 1.0 1000 µA
±2.0 ±3.0 %
±0.1 ±0.3 %
±5.0 ±10 mV
300 500 nA
REV. 1.2.1 6/14/01 3
RC4200 PRODUCT SPECIFICATION
Electrical Characteristics (continued)
(Over operating temperature range, V
Parameters Test Conditlons
Frequency Response,
-3dB point
Supply Voltage -18
Supply Current I1 = I2 = I4 = 150 µA
T
Notes:
1. Refer to Figure 6 for example.
2. The input circuits tend to become unstable at I
(eq. @ I
3. These specifications apply with output (I
be used to drive a resistive load directly. The resistive load should be less than 700Ω and must be pulled up to a positive
supply such that the voltage on pin (4) stays within a range of 0 to +5V.
= I2 = 500 µA, nonlinearity error ≈ 0.5%).
1
= -15V unless otherwise noted)
S
= +25°C
A
, I2, I4 < 50 µA and linearity decreases when I1, I2, I4 > 250 µA
1
) connected to an op amp summing junction. If desired, the output (I3) at pin (4) can
3
4200A 4200
Min. Typ. Max. Min. Typ. Max. Units
4.0
-15 -9.0 -18
4.0
-15 -9.0
MHz
V
4.0 4.0 mA
Applications Discussion
Current Multiplier/ Divider
The basic design criteria for all circuit configurations using
the RC4200 multiplier is contained in equation (1), that is,
I1I
I
2
---------=
3
I
4
The current-product-balance equation restates this as:
I1I2I3I4 6()=
R
V
X
1
+
=
I
1
I
V
R
1
X
7
1
RC4200
R
V
Y
2
+
V
I2 =
R
1
I
2
Y
2
2
–V
3
S
Figure 1. Current Multiplier/Divider
58
I
4
V
I4 =
R
Ammeter
4
I
3
6
R
4
+V
Z
Z
4
A
65-4200-02
Dynamic Range and Stability
The precision dynamic range for the RC4200 is from +50
µA
to +250 µA inputs for I1, I2 and I4. Stability and accuracy
degrade if this range is exceeded.
To improve the stability for input currents less than 50 µA,
filter circuits (RSCS) are added to each input (see Figure 2).
R
+V
4
+V
Z
R
S
C
S
R
O
S
–
A1
+
–V
S
V
65-4200-03
O
R
V
X
+
V
Y
R
S
C
S
1
R
C
S
R
2
R
C
S
= 10k Ohms
= 0.005 µF
I
S
1
7
RC4200
1
I
S
2
2
3
–V
S
58
I
4
4
I
3
6
Figure 2. Current Multiplier/Divider with Filters
Amplifier A1 is used to convert the I3 current to an output
voltage.
Multiplier: Vz = constant ≠ 0
Divider: Vy = constant ≠ 0
4 REV. 1.2.1 6/14/01
PRODUCT SPECIFICATION RC4200
VXmin.()VXVX(max.)≤≤
VYmin.()VYVY(max.)≤≤
∆VYVY(max.) = =V
Y
(min.)
Voltage Multiplier/Divider
R
R
V
X
1
I
1
7
4
58
I
4
V
Z
RC4200
R
2
V
Y
VXV
R1R
VOV
Y
=
ROR
2
1
I
2
2
3
–V
Z
4
S
4
V
R
O
I
6
O
3
65-4200-04
Figure 3. Voltage Multiplier/Divider
Solving for V
--------------------------------------=
0
VZ R1R
For a multiplier circuit V
VXVY R0R
Therefore: V
For a divider circuit V
Therefore: V
VXVYK where K
0
Y
V
X
--------
0
K where K
V
Z
Z
4
2
V
R
VRcons ttan==
cons ttan==
R0R
4
---------------------==
VRR1R
V
RR0R4
---------------------==
R1R
2
2
Extended Range
The input and output voltage ranges can be extended to
include 0 and negative voltage signals by adding bias
currents. The RSCS filter circuits are eliminated when the
input and biasing resistors are selected to limit the respective
currents to 50 µA min. and 250 µA max.
Extended Range Multiplier
+V
REF
V
X
(Input)
V
Y
(Input)
R
A
R
1
R
B
I
1
7
RC4200
R
2
1
I
2
2
3
R
C4
–V
R
C
58
I
4
4
I
3
6
S
R
D
V
S
O
(Output)
R
O
+V
Resistors Ra and Rb extend the range of the VX and VY
inputs by picking values such that:
I
min.()
1
and I1(max.)
also I2(min.)
(max.)
and I
2
Resistor R
C
V
X
-----------------------R
VX(max.)
------------------------
V
-----------------------
V
------------------------
supplies bias current for I3 which allows the
V
REF
--------------+ 50 µA,==
R
1
(min.)
R
2
(max.)
R
2
R
a
V
REF
--------------+ 250 µA,==
R
a
V
REF
--------------+ 50 µA,==
R
b
V
REF
--------------+ 250 µA.==
R
b
1
Y
Y
min.()
output to go negative.
Resistors RCX and RCY permit equation (6) to balance, ie.:
V
V
X
--------
R
1
VYV
X
-----------------R1R
2
V0V
REF
------------------------
R0R
V
REF
Y
----------------+
--------
R
R
a
2
VXV
REF
------------------------R1R
b
VXV
REF
-------------------------
RcxR
d
d
VYV
-------------------------
V
REF
----------------+
R
b
REF
R2R
VYV
-------------------------
RCYR
a
REF
V
V
0
=
----------------
-------
R
0
V
REF
----------------
= +++
RaR
b
V
REF
---------------RcR
d
REF
R
C
2
+++
d
------------R
CX
X
Y
-------------+++
R
CY
REF
----------------
R
D
V
V
V
Cross-Product Cancellation
Cross-products are a result of ths V
To the extend that R1Rb = RCXRD, and R2Ra = RCYRd
cross-product cancellation will occur.
XVR
and V
YVR
terms.
Arithmetic Offset Cancellation
The offset caused by the V
extent that RaRb = R0Rd, and the result is:
X
2
V0V
REF
--------------------R0R
d
R0R
d
---------------------------V
REFR1R2
or V0VXVYK==
VYV
---------------R1R
where K =
2
term will cancel to the
REF
Resistor Values
Inputs:
∆VXVX(max.) – =V
V
REF
Constant (+7V to +18V)=
(min.)
X
Figure 4. Extended Range Multiplier
REV. 1.2.1 6/14/01 5
V
R
CX
–V
S
65-4200-05
K
0
---------------VXV
Design Requirements()=
Y
RC4200 PRODUCT SPECIFICATION
R
1
R
a
R
b
R
c
∆V
X
-----------------
, R
200µA
--------------------------------------------------------------------------------=
250µA∆VX200µAVXmax.()–
--------------------------------------------------------------------------------=
250µA∆VY200µAVYmax.()–
RaR
b
-------------
, R
CX
R
d
2
∆VXV
∆VXV
∆V
Y
----------------200µA
REF
REF
R1R
b
------------R
d
, R
, R
d
cy
V
REF
-----------------===
250µA
R2R
a
-------------===
R
d
Multiplying Circuit Offset Adjust
10K ≤ R5 = R9 = R
R
= R
7
R6 = R
R
15
R
8
R
12
R
13
= R14, = 100Ω
11
= 100Ω (VS/0.05)
10
= 100Ω (VS/0.10)
= R1 | | R
= R2 | | R
a
b
= R0 | | RC | | RCX | | R
16
≤ 50K
CY
∆VX∆VYK
R
-----------------------------=
0
160µA
+V
REF
+V
RaR
b
R
–V
1
I
R
6
2
CY
8
R
7
0.1 µF
R
R
10
R
R
R
S
R
1
I
2
12
11 0.1 µF
R
CX
7
1
2
–V
RC4200
3
S
V
X
(Input)
V
Y
(Input)
+V
S
R
X
OS
5
–V
S
+V
S
R
9
Y
OS
6
0.1 µF
R
c
58
I
4
I
3
R
d
100 R
d
R
4
17
R17–R20 can be used to help cancel
crossproduct errors caused by resistor
product mismatch.
R
O
–
R19
R
18
RC5534
+
R
13
+V
S
S
R20 Z
–V
S
VO
(Output)
OS
R16 V
OS
R
R
14
15
–V
S
65-4200-06
Figure 5. Multiplying Circuit Offset Adjust
Procedure
1. Set all trimmer pots to 0V on the wiper.
2. Connect VX input to ground. Put in a full scale square
wave on VY input. Adjust XOS(R5) for no square wave
on V0 output (adjust for 0 feedthrough).
6 REV. 1.2.1 6/14/01
3. Connect VY input to ground. Put in a full scale square
wave on VX input. Adjust YOS(R9) for no square wave
on V0 output (adjust for 0 feedthrough).
4. Connect VX and VY to ground. Adjust VOS(R16) for 0V
on V0 output.
PRODUCT SPECIFICATION RC4200
Extended Range Divider
+V
REF
+V
REF
R
d
R4
4
R
O
+V
S
RC5534
-V
S
65-4200-08
V
V
REF
Z
----------------+
--------
R
R
C
D
4
V
Z
(Output)
V
O
(Output)
V
X
(Input)
R1
R
a
R
b
I
1
I
2
7
RC4200
Multiplier
1
2
-V
R
ao
3
S
R
az
c
58
I
4
I
3
6
R
Figure 6. Extended Range Divider
As with the extended range multiplier, resistors Raz and Rao
are added to cancel the cross-product error caused by the
biasing resistors, i.e.
X
--------
R
1
VXV
REF
------------------------R1R
V0V
Z
----------------
R0R
4
0
----------+
R
ao
b
V0V
-----------------------R0R
Z
---------R
az
V0V
REF
-----------------------RaoR
REF
d
REF
----------------++
R
a
VZV
-------------------------
b
VZV
------------------------R4R
REF
----------------
R
b
REF
RazR
b
V
REF
REF
---------------RcR
c
V
----------------
V
V
V
V
V
V
V
REF
0
----------------+
=
-------
R
R
0
2
REF
=++ +
RaR
b
2
+++
d
To cancel cross-product and arithmetic offset:
Notice that it is necessary to match the above resistor crossproducts to within the amount of error tolerable in the output offset, i.e., with a 10V F.S. output, 0.1% resistor crossproduct match will give 0.1% x 10V. untrimmable output
offset voltage.
Resistor Values
Inputs:
(min.) ≤ VX ≤ VX(max.)
V
X
∆VX = VX(max.) = VX(min.)
VZ(min.) ≤ VZ ≤ VZ(max.)
∆V
= VZ(max.) = VZ(min.)
Z
V
= Constant (+7V to +18V)
REF
Outputs:
V0 (min.) ≤ V0 ≤ V0 (max.)
∆V0 = V0 (max.) = V0 (min.)
V0V
Z
K
R
0
R
c
R
d
R
a
R
1
--------------
Design Requirement()=
V
X
∆V
0
-----------------
, R
750µA
------------------------------------------------------------------------------=
750µA∆V0700µAV0max.()–
-------------------------------------------------------------------------------=
250µA∆VZ200µAVZmax.()–
RcR
------------R
∆V0∆V
----------------------=
600µAK
b
d
, R
az
b
Z
∆V
------------------
∆V0V
∆VXV
RcR
-------------
REF
250µA
REF
REF
4
, R
R
b
, R
ao
4
∆V
Z
-----------------===
200µA
R0R
d
-------------===
R
b
RaoRb = R0Rd, RazRb = R4Rc and RaRb = RcRd
and the result is:
REF
b
V
0VZ
--------------
=
V
----------------------------
or V
R0R
4
REFR0R4
R1R
b
VXV
---------------------R1R
where K =
REV. 1.2.1 6/14/01 7
0
=
V
X
-----------VZK
Loading...