Fairchild NC7NZ34K8X, NC7NZ34L8X Schematic [ru]
NC7NZ34
NC7NZ34 TinyLogic
July 2001
Revised November 2005
TinyLogic
General Description
The NC7NZ34 is a triple buffer from Fairchild’s Ultra High
Speed Series of TinyLogic
age. The device is fabrica ted with advanced CM OS technology to achieve ultra high spe ed with high output drive
while maintaining low static power dissipation o ver a very
broad V
operate over the 1.65 V to 5 .5V V
outputs are high impedance w hen V
ate voltages up to 7V inde pendent of V
age.
operating range. The device is specified to
CC
UHS Triple Buffer
in the space saving US8 pack-
range. The inputs a nd
CC
is 0V. Inputs toler-
CC
operating volt-
CC
Features
■ Space saving US8 surface mount package
■ MicroPak
■ Ultra High Speed: t
■ High Output Drive: ±24 mA at 3V V
■ Broad VCC Operating Range: 1.65V to 5.5V
■ Power down high impedance inputs/outputs
■ Overvoltage tolerant inputs facilitate 5V to 3V translation
■ Patented noise/EMI reduction circuitry implemented
Pb-Free leadless package
2.4 ns Typ into 50 pF at 5V V
PD
CC
CC
Ordering Code:
Product
Package Description Supplied AsOrder Package Code
Number Number Top Mark
NC7NZ34K8X MAB08A NZ34 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
NC7NZ34L8X MAC08A P9 Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel
Pb-Free pac k age per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagrams
UHS Triple Buff er
Pin Descriptions
Pin Names Description
, A2, A
A
1
3
Y
, Y2, Y
1
3
Function Table
Input Output
AY
LL
HH
H = HIGH Logic Le v el
L = LOW Logic Level
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak is a trademark of Fairchild Semicon duc t or Corporation.
© 2005 Fairchild Semiconductor Corporation DS500494 www.fairchildsemi.com
Y = A
Data Inputs
Output
AAA represents Product Code Top Mark - see ordering code
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
Pin One Orientation Diagram
Pad Assignments for MicroPak
(Top View)
(Top Thru View)
Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V
DC Input Voltage (V
NC7NZ34
DC Output Voltage (V
DC Input Diode Current (I
V
< 0V −50 mA
IN
DC Output Diode Current (I
< 0V −50 mA
V
OUT
DC Output Source/Sink Current (I
DC V
/GND Current (ICC/I
CC
Storage Te mperature (T
Junction Temperature under Bias (T
Junction Lead Temperature (T
) −0.5V to +7.0V
IN
) −0.5V to +7.0V
OUT
)
IK
)
OK
) ±50 mA
OUT
) ±100 mA
GND
) −65°C to +150°C
STG
) 150°C
J
)
L
(Soldering, 10 seconds) 260
Power Dissipation (P
) @ +85°C 250 mW
D
Conditions
Supply Voltage
Operating (V
Data Retention 1.5V to 5.5V
Input Voltage (V
Output Voltage (V
Input Rise and Fall Time (tr, tf)
= 1.8V, 2.5V ± 0.2V 0 to 20 ns/V
V
CC
V
= 3.3V ± 0.3V 0 to 10 ns/V
CC
V
= 5.5V ± 0.5V 0 to 5 ns/V
CC
Operating Temperature (T
Thermal Resistance (
Note 1: Absolute maximum ratings are DC values beyond which the devi ce
°C
may be damage d or h ave its us eful life im pai red. Th e dat as heet sp ecific ations should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading variables. Fairchild does no t recommend operation outsid e datasheet spec ifications.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
(Note 2)
) 1.65V to 5.5V
CC
)0V to 5.5V
IN
) 0V to V
OUT
) −40°C to +85°C
A
θ
)250°C/W
JA
DC Electrical Characteristics
Symbol Parameter
V
IH
V
IL
V
OH
V
OL
I
IN
I
OFF
I
CC
HIGH Level Control 1.8 ± 0.15 0.75 V
Input Voltage 2.3 to 5.5 0.7 V
LOW Level Control 1.8 ± 0.15 0.25 V
Input Voltage 2.3 to 5.5 0.3 V
HIGH Level Control 1.65 1.55 1.65 1.55
Output Voltage 2.3 2.2 2.3 2.2
LOW Level Control 1.65 0.0 0.1 0.1
Output Voltage 2.3 0.0 0.1 0.1
Input Leakage Current 0 to 5.5 ±0.1 ±1.0 µA0 ≤ VIN ≤ 5.5V
Power Off Leakage Current 0.0 1.0 10 µAVIN or V
Quiescent Supply Current 1.65 to 5.5 1.0 10 µAVIN = 5.5V, GND
V
CC
(V) Min Typ Max Min Max
3.0 2.9 3.0 2.9
4.5 4.4 4.5 4.4
1.65 1.29 1.52 1.29 I
2.3 1.9 2.14 1.9 IOH = −8 mA
3.0 2.4 2.75 2.4 I
3.0 2.3 2.62 2.3 I
4.5 3.8 4.13 3.8 IOH = −32 mA
3.0 0.0 0.1 0.1
4.5 0.0 0.1 0.1
1.65 0.08 0.24 0.24 IOL = 4 mA
2.3 0.10 0.3 0.3 IOL = 8 mA
3.0 0.16 0.4 0.4 IOL = 16 mA
3.0 0.24 0.55 0.55 IOL = 24 mA
4.5 0.25 0.55 0.55 IOL = 32 mA
TA = +25°CT
CC
CC
A
0.75 V
0.7 V
CC
CC
= −40°C to +85°C
CC
CC
0.25 V
0.3 V
CC
Units Conditions
CC
V
V
VV
IN
VV
IN
= V
= V
IOH = −100 µA
IH
OH
OH
OH
IOL = 100 µA
IL
= 5.5V
OUT
CC
= −4 mA
= −16 mA
= −24 mA
www.fairchildsemi.com 2
AC Electrical Characteristics
V
Symbol Parameter
t
Propagation Delay 1.8 ± 0.15 1.8 4.6 8.0 1.8 8.8
PLH
t
PHL
CC
(V) Min Typ Max Min Max Number
2.5 ± 0.2 1.0 3.0 5.2 1.0 5.8 CL = 15 pF,
3.3 ± 0.3 0.8 2.3 3.6 0.8 4.0 R
5.0 ± 0.5 0.5 1.8 2.9 0.5 3.2
Propagation Delay 3.3 ± 0.3 1.2 3.0 4.6 1.2 5.1
t
PLH
t
PHL
Input Capacitance 0 2.5 pF
C
IN
C
Power Dissipation 3.3 9
PD
5.0 ± 0.5 0.8 2.4 3.8 0.8 4.2 RL = 500Ω
Capacitance 5.0 11
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
loading and operating at 50% duty cycle. (See Figure 2.) C
= (CPD)(VCC)(fIN) + (ICCstatic).
I
CCD
TA = +25°CT
is related to I
PD
dynamic operating current by the express ion:
CCD
= −40°C to +85°C
A
Units Conditions
ns
L
CL = 50 pF,
ns
pF (Note 3) Figure 2
Dynamic Switching Characteristics
V
Symbol Parameter Conditions
V
OLP
V
OLV
Quiet Output Dynamic Peak V
Quiet Output Dynamic Valley V
OL
OL
CL = 50pF, VIH = 5.0V, VIL = 0V 5.0 0.8 V
CL = 50pF, VIH = 5.0V, VIL = 0V 5.0 −0.8 V
CCTA
(V) Typical
AC Loading and Waveforms
= 1 MΩ
CCD
= 25°C
Figure
Figures
Figures
) at no output
Unit
NC7NZ34
1, 3
1, 3
CL includes load and s tr ay c apacitance
Input PR R = 1.0 MHz; t
= 500 ns
W
FIGURE 1. AC Test Circuit
Input = AC Wavefor m; tr = tf = 1.8 ns;
PRR = 10 MHz; Duty Cycle = 50%
FIGURE 2. I
CCD
FIGURE 3. AC Waveforms
Test Circuit
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