Page 1
FSBB15CH60 Motion SPM® 3 Series
January 2014
©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FSBB15CH60 Rev. C6
FSBB15CH60
Motion SPM® 3 Series
Features
• UL Certified No. E209204 (UL1557)
• 600 V - 15 A 3-Phase IGBT Inverter with Integral Gate
Drivers and Protection
• Low-Loss, Short-Circuit Rated IGBTs
• Very Low Thermal Resistance Using Al
2O3
DBC Sub-
strate
• Dedicated Vs Pins Simplify PCB Layout
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Single-Grounded Power Supply
• Isolation Rating: 2500 V
rms
/ min.
Applications
• Motion Control - Home Appliance / Industrial Motor
Related Resources
• AN-9035 - Motion SPM 3 Series Ver.2 User’s Guide
General Description
FSBB15CH60 is a Motion SPM® 3 module providing a
fully-featured, high-performance inverter output stage
for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs
to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, over-current shutdown, and fault reporting.
The built-in, high-speed HVIC requires only a single supply voltage and translates the incoming logic-level gate
inputs to the high-voltage, high-current drive signals
required to properly drive the module's internal IGBTs.
Separate negative IGBT terminals are available for each
phase to support the widest variety of control algorithms.
Package Marking and Ordering Information
Figure 1. Package Overview
Device Device Marking Package Packing Type Quantity
FSBB15CH60 FSBB15CH60 SPMCA-027 Rail 10
Page 2
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Integrated Power Functions
• 600 V - 15 A IGBT inverter for three-phase DC / AC power conversion (please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out Protection (UVLO)
Note: Available bootstrap circuit example is given in Figures 10 and 11.
• For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out Protection (UVLO)
• Fault signaling: corresponding to UVLO (low-side supply) and SC faults
• Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input
Pin Configuration
Figure 2. Top View
(21) N
U
(22) N
V
(23) N
W
(27) P
U
(25) V
(26) W
Case Temperature (T
C
)
Detecting Point
DBC Substrate
(21) N
U
(22) N
V
(23) N
W
(27) P
(24)
(25) V
(26) W
Case Temperature (T
C
)
Detecting Point
(1) V
CC(L)
(2) COM
(3) IN
(UL)
(4) IN
(VL)
(5) IN
(WL)
(6) V
FO
(15) V
B(V)
(16) V
S(V)
(17) IN
(WH)
(18) V
CC(WH)
(19) V
B(W)
(20) V
S(W)
(7) C
FOD
(8) C
SC
(9) IN
(UH)
(10) V
CC(UH)
(11) V
B(U)
(12) V
S(U)
(13) IN
(VH)
(14) V
CC(VH)
(1) V
CC(L)
(2) COM
(3) IN
(UL)
(4) IN
(VL)
(5) IN
(WL)
(6) V
FO
(15) V
B(V)
(16) V
S(V)
(17) IN
(WH)
(18) V
CC(WH)
(19) V
B(W)
(20) V
S(W)
(7) C
FOD
(8) C
SC
(9) IN
(UH)
(10) V
CC(UH)
(11) V
B(U)
(12) V
S(U)
(13) IN
(VH)
(14) V
CC(VH)
13.7
19.2
(21) N
U
(22) N
V
(23) N
W
(27) P
U
(25) V
(26) W
Case Temperature (T
C
)
Detecting Point
DBC Substrate
(21) N
U
(22) N
V
(23) N
W
(27) P
(24)
(25) V
(26) W
Case Temperature (T
C
)
Detecting Point
(1) V
CC(L)
(2) COM
(3) IN
(UL)
(4) IN
(VL)
(5) IN
(WL)
(6) V
FO
(15) V
B(V)
(16) V
S(V)
(17) IN
(WH)
(18) V
CC(WH)
(19) V
B(W)
(20) V
S(W)
(7) C
FOD
(8) C
SC
(9) IN
(UH)
(10) V
CC(UH)
(11) V
B(U)
(12) V
S(U)
(13) IN
(VH)
(14) V
CC(VH)
(1) V
CC(L)
(2) COM
(3) IN
(UL)
(4) IN
(VL)
(5) IN
(WL)
(6) V
FO
(15) V
B(V)
(16) V
S(V)
(17) IN
(WH)
(18) V
CC(WH)
(19) V
B(W)
(20) V
S(W)
(7) C
FOD
(8) C
SC
(9) IN
(UH)
(10) V
CC(UH)
(11) V
B(U)
(12) V
S(U)
(13) IN
(VH)
(14) V
CC(VH)
(1) V
CC(L)
(2) COM
(3) IN
(UL)
(4) IN
(VL)
(5) IN
(WL)
(6) V
FO
(15) V
B(V)
(16) V
S(V)
(17) IN
(WH)
(18) V
CC(WH)
(19) V
B(W)
(20) V
S(W)
(7) C
FOD
(8) C
SC
(9) IN
(UH)
(10) V
CC(UH)
(11) V
B(U)
(12) V
S(U)
(13) IN
(VH)
(14) V
CC(VH)
(1) V
CC(L)
(2) COM
(3) IN
(UL)
(4) IN
(VL)
(5) IN
(WL)
(6) V
FO
(15) V
B(V)
(16) V
S(V)
(17) IN
(WH)
(18) V
CC(WH)
(19) V
B(W)
(20) V
S(W)
(7) C
FOD
(8) C
SC
(9) IN
(UH)
(10) V
CC(UH)
(11) V
B(U)
(12) V
S(U)
(13) IN
(VH)
(14) V
CC(VH)
13.7
19.2
13.7
19.2
Page 3
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Pin Descriptions
Pin Number Pin Name Pin Description
1V
CC(L)
Low-Side Common Bias Voltage for IC and IGBTs Driving
2 COM Common Supply Ground
3IN
(UL)
Signal Input for Low-Side U-Phase
4IN
(VL)
Signal Input for Low-Side V-Phase
5IN
(WL)
Signal Input for Low-Side W-Phase
6V
FO
Fault Output
7C
FOD
Capacitor for Fault Output Duration Selection
8C
SC
Capacitor (Low-pass Filter) for Short-Circuit Current Detection Input
9IN
(UH)
Signal Input for High-Side U-Phase
10 V
CC(UH)
High-Side Bias Voltage for U-Phase IC
11 V
B(U)
High-Side Bias Voltage for U-Phase IGBT Driving
12 V
S(U)
High-Side Bias Voltage Ground for U-Phase IGBT Driving
13 IN
(VH)
Signal Input for High-Side V-Phase
14 V
CC(VH)
High-Side Bias Voltage for V-Phase IC
15 V
B(V)
High-Side Bias Voltage for V-Phase IGBT Driving
16 V
S(V)
High-Side Bias Voltage Ground for V-Phase IGBT Driving
17 IN
(WH)
Signal Input for High-Side W Phase
18 V
CC(WH)
High-Side Bias Voltage for W-Phase IC
19 V
B(W)
High-Side Bias Voltage for W-Phase IGBT Driving
20 V
S(W)
High-Side Bias Voltage Ground for W-Phase IGBT Driving
21 N
U
Negative DC-Link Input for U-Phase
22 N
V
Negative DC-Link Input for V-Phase
23 N
W
Negative DC-Link Input for W-Phase
24 U Output for U-Phase
25 V Output for V-Phase
26 W Output for W-Phase
27 P Positive DC-Link Input
Page 4
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Internal Equivalent Circuit and Input/Output Pins
Figure 3. Internal Block Diagram
1st Notes:
1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions.
2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
COM
VCC
IN(UL )
IN(VL)
IN(WL)
VFO
C(FOD)
C(SC)
OUT(UL)
OUT(VL)
OUT(WL)
NU (21)
N
V
(22)
N
W
(23)
U (24)
V (25)
W (26)
P (27)
(20) V
S(W)
(19) V
B(W)
(16) V
S(V)
(15) V
B(V)
(8) C
SC
(7) C
FOD
(6) V
FO
(5) IN
(WL)
(4) IN
(VL)
(3) IN
(UL)
(2) COM
(1) V
CC(L)
VCC
VB
OUT
COM
VS
IN
VB
VS
OUT
IN
COM
VCC
VCC
VB
OUT
COM
VS
IN
(18) V
CC(WH)
(17) IN
(WH)
(14) V
CC(VH)
(13) IN
(VH)
(12) V
S(U)
(11) V
B(U)
(10) V
CC(UH)
(9) IN
(UH)
V
SL
Page 5
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Absolute Maximum Ratings (T
J
= 25°C, unless otherwise specified.)
Inverter Part
2nd Notes:
1. The maximum junction temperature rating of the power chips integrated within the Motion SPM
®
3 product is 150C (at TC 100C). However, to insure safe operation of the
Motion SPM 3 product, the average junction temperature should be limited to T
J(ave)
125C (at TC 100C)
Control Part
Total System
Thermal Resistance
2nd Notes:
2. For the measurement point of cas e temperature(TC), please refer to Figure 2.
Symbol Parameter Conditions Rating Unit
V
PN
Supply Voltage Applied between P- NU, NV, N
W
450 V
V
PN(Surge)
Supply Voltage (Surge) Applied between P- NU, NV, N
W
500 V
V
CES
Collector - Emitter Voltage 600 V
± I
C
Each IGBT Collector Current TC = 25°C 15 A
± I
CP
Each IGBT Collector Current (Peak) TC = 25°C, Under 1ms Pulse Width 30 A
P
C
Collector Dissipation TC = 25°C per Chip 50 W
T
J
Operating Junction Temperature (2nd Note 1) -20 ~ 125 °C
Symbol Parameter Conditions Rating Unit
V
CC
Control Supply Voltage Applied between V
CC(UH)
, V
CC(VH)
, V
CC(WH)
, V
CC(L)
-
COM
20 V
V
BS
High-Side Control Bias
Voltage
Applied between V
B(U)
- V
S(U)
, V
B(V)
- V
S(V)
, V
B(W)
-
V
S(W)
20 V
V
IN
Input Signal Voltage Applied between IN
(UH)
, IN
(VH)
, IN
(WH)
, IN
(UL)
, IN
(VL)
,
IN
(WL)
- COM
-0.3 ~ 17 V
V
FO
Fault Output Supply Voltage Applied between VFO - COM -0.3 ~ VCC+0.3 V
I
FO
Fault Output Current Sink Current at VFO Pin 5 mA
V
SC
Current-Sensing Input Voltage Applied between CSC - COM -0.3 ~ VCC+0.3 V
Symbol Parameter Conditions Rating Unit
V
PN(PROT)
Self-Protection Supply Voltage Limit
(Short-Circuit Protection Capability)
VCC = VBS = 13.5 ~ 16.5 V
T
J
= 125°C, Non-Repetitive, < 2 s
400 V
T
C
Module Case Operation Temperature -20CTJ 125C, See Figure 2 -20 ~ 100 °C
T
STG
Storage Tempera ture -40 ~ 125 °C
V
ISO
Isolation Voltage 60 Hz, Sinusoidal, AC 1 Minute, Connect
Pins to Heat Sink Plate
2500 V
rms
Symbol Parameter Condition Min. Typ. Max. Unit
R
th(j-c)Q
Junction to Case Thermal
Resistance
Inverter IGBT Part (per 1 / 6 module) - - 2.02 °C/W
R
th(j-c)F
Inverter FWD Part (per 1 / 6 module) - - 3.15 °C/W
Page 6
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Electrical Characteristics (T
J
= 25°C, unless otherwise specified.)
Inverter Part
2nd Notes:
3. tON and t
OFF
include the propagation delay of the internal drive IC. t
C(ON)
and t
C(OFF)
are the switching time of IGBT itself under the given gate driving condition internally. For
the detailed information, please see Figure 4.
Figure 4. Switching Time Definition
Symbol Parameter Conditions Min. Typ. Max. Unit
V
CE(SAT)
Collector - Emitter
Saturation Voltage
VCC = VBS = 15 V
V
IN
= 5 V
I
C
= 15 A, TJ = 25°C - - 2.3 V
V
F
FWDi Forward Voltage VIN = 0 V IC = 15 A, TJ = 25°C - - 2.1 V
HS t
ON
Switching Times VPN = 300 V, VCC = VBS = 15 V
I
C
= 15 A
V
IN
= 0 V 5 V, Inductive Load
(2nd Note 3)
-0.4- s
t
C(ON)
-0.28- s
t
OFF
-0.67- s
t
C(OFF)
-0.35- s
t
rr
-0.10- s
LS t
ON
VPN = 300 V, VCC = VBS = 15 V
I
C
= 15 A
V
IN
= 0 V 5 V, Inductive Load
(2nd Note 3)
-0.55- s
t
C(ON)
-0.24- s
t
OFF
-0.73- s
t
C(OFF)
-0.34- s
t
rr
-0.10- s
I
CES
Collector - Emitter
Leakage Current
VCE = V
CES
- - 250 A
V
CE
I
C
V
IN
t
ON
t
C(ON)
V
IN(ON)
10% I
C
10% V
CE
90% I
C
100% I
C
t
rr
100% I
C
0
V
CE
I
C
V
IN
t
OFF
t
C(OFF)
V
IN(OFF)
10% V
CE
10% I
C
(a) turn -o n
(b) turn -o ff
Page 7
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Electrical Characteristics (T
J
= 25°C, unless otherwise specified.)
Control Part
2nd Notes:
4. Short-circuit protection is functioning only at the low-sides.
5. The fault-out pulse width t
FOD
depends on the capacitance value of C
FOD
according to the following approximate equation: C
FOD
= 18.3 x 10-6 x t
FOD
[F]
Recommended Operating Conditions
Symbol Parameter Conditions Min. Typ. Max. Unit
I
QCCL
Quiescent VCC Supply
Current
VCC = 15 V
IN
(UL, VL, WL)
= 0 V
V
CC(L)
- COM - - 23 mA
I
QCCH
VCC = 15 V
IN
(UH, VH, WH)
= 0 V
V
CC(UH)
, V
CC(VH)
, V
CC(WH)
- COM
- - 100
A
I
QBS
Quiescent VBS Supply Current VBS = 15 V
IN
(UH, VH, WH)
= 0 V
V
B(U)
- V
S(U)
, V
B(V)
- V
S(V)
,
V
B(W)
- V
S(W)
- - 500 A
V
FOH
Fault Output Voltage VSC = 0 V, VFO Circuit: 4.7 k to 5 V Pull-up 4.5 - - V
V
FOL
VSC = 1 V, VFO Circuit: 4.7 k to 5 V Pull-up - - 0.8 V
V
SC(ref)
Short Circuit Current Trip Level VCC = 15 V (2nd Note 4) 0.45 0.50 0.55 V
UV
CCD
Supply Circuit Under-Voltage
Protection
Detection Level 10.7 11.9 13.0 V
UV
CCR
Reset Level 11.2 12.4 13.2 V
UV
BSD
Detection Level 10.1 11.3 12.5 V
UV
BSR
Reset Level 10.5 11.7 12.9 V
t
FOD
Fault-out Pulse Width C
FOD
= 33 nF (2nd Note 5) 1.0 1.8 - ms
V
IN(ON)
ON Threshold Voltage Applied between IN
(UH)
, IN
(VH)
, IN
(WH)
, IN
(UL)
,
IN
(VL)
, IN
(WL)
- COM
3.0 - - V
V
IN(OFF)
OFF Threshold Voltage - - 0.8 V
Symbol Parameter Conditions Min. Typ. Max. Unit
V
PN
Supply Voltage Applied between P - NU, NV, N
W
- 300 400 V
V
CC
Control Supply Voltage Applied between V
CC(UH)
, V
CC(VH)
, V
CC(WH)
,
V
CC(L)
- COM
13.5 15 16.5 V
V
BS
High-Side Bias Voltage Applied between V
B(U)
- V
S(U)
, V
B(V)
- V
S(V)
,
V
B(W)
- V
S(W)
13.0 15 18.5 V
dV
CC
/ dt,
dV
BS
/ dt
Control Supply Variation -1 - 1 V /
s
t
dead
Blanking Time for Preventing
Arm-Short
For Each Input Signal 2.0 - - s
f
PWM
PWM Input Signal -20C TC 100°C, -20C TJ 125°C - - 20 kHz
V
SEN
Voltage for Current Sensing Applied between NU, NV, N
W
- COM
(Including Surge Voltage)
-4 4 V
Page 8
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Mechanical Characteristics and Ratings
Figure 5. Flatness Measurement Position
Parameter Conditions Min. Typ. Max. Unit
Mounting Torque Mounting Screw: M3 Recommended 0.62 N•m 0.51 0.62 0.72 N•m
Device Flatness See Figure 5 0 - +120
m
Weight - 15.00 - g
( + )
( + )
( + )
( + )
Page 9
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Time Charts of Protective Function
a1 : Control supply voltage rises: after the voltage rises UV
CCR
, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under-Voltage detection (UV
CCD
).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts.
a6 : Under-Voltage reset (UV
CCR
).
a7 : Normal operation: IGBT ON and carrying current.
Figure 6. Under-Voltage Protection (Low-Side)
b1 : Control supply voltage rises: after the voltage reaches UV
BSR
, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under-Voltage detection (UV
BSD
).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under-Voltage reset (UV
BSR
).
b6 : Normal operation: IGBT ON and carrying current.
Figure 7. Under-Voltage Protection (High-Side)
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UV
CCR
Protection
Circuit State
SET RESET
UV
CCD
a1
a3
a2
a4
a6
a5
a7
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UV
BSR
Protection
Circuit State
SET RESET
UV
BSD
b1
b3
b2
b4
b6
b5
High-level (no fault output)
Page 10
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com
FSBB15CH60 Rev. C6
(with the external shunt resistance and CR connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short-Circuit current detection (SC trigger).
c3 : Hard IGBT gate interrupt.
c4 : IGBT turns OFF.
c5 : Fault output timer operation starts: the pulse width of the fault output signal is set by the external capacitor C
FO
.
c6 : Input “LOW”: IGBT OFF state.
c7 : Input “HIGH”: IGBT ON state, but during the active period of fault output, the IGBT doesn’t turn ON.
c8 : IGBT OFF state.
Figure 8. Short-Circuit Protection (Low-Side Operation Only)
Internal IGBT
Gate - Emitter Voltage
Lower Arms
Control Input
Output Current
Sensing Voltage
of Shunt Resistance
Fault Output Signal
SC Reference Voltage
CR Circuit Time
Constant Delay
SC
Protection
Circuit State
SET
RESET
c6
c7
c3
c2
c1
c8
c4
c5
Page 11
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 11 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Figure 9. Recommended MCU I/O Interface Circuit
3rd Notes:
1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme in the application and the wiring impedance of the application’s printed
circuit board. The Motion S P M
®
3 Product input signal section integrates a 3.3 k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, pay attention to
the signal voltage drop at input terminal.
2. The logic input works wi th standard CMOS or LSTTL outputs.
Figure 10. Recommended Bootstrap Operation Circuit and Parameters
3rd Notes:
3. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.
4. The bootstrap resistor (R
BS
) should be three times greater than R
E(H)
. The recommended value of R
E(H)
is 5.6 , but it can be increased up to 20 (maximum) for a slower dv /
dt of high-side.
5. The ceramic capacitor placed between V
CC
- COM should be over 1 F and mounted as close to the pins of the Mo tion SPM 3 product as possible.
MCU
SPM
COM
+5 V
1 nF
4.7 k
,,
IN
(UL)IN(VL)
IN
(WL)
,,
IN
(UH)IN(VH)
IN
(WH)
V
FO
100
1 nF
RPF=
C
PF
=
+15 V
22 µF
0.1 µF
1000 µF1 µF
One-Leg Diagram of
Motion SPM 3 Product
Vcc
IN
COM
VB
HO
VS
Vcc
IN
COM
OUT
Inverter
Output
P
N
These values depend on PWM control algorithm.
D
BS
R
BS
R
E(H)
V
SL
Page 12
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 12 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Figure 11. Typical Application Circuit
4th Notes:
1. To avoid malfunction, the wiring of each input should be as short as possible (less than 2 - 3 cm).
2. By virtue of integrating an application-specific type of HVIC inside the Motion SPM
®
3 product, direct coupling to MCU terminals without any optocoupler or transformer isola-
tion is possible.
3. V
FO
output is open-collector type. This signal line should be pulled up to the positive side of the 5 V power supply with approximately 4.7 k resistance (please refer to Figure
9).
4. C
SP15
of around seven times larger than bootstrap capacitor CBS is recommended.
5. V
FO
output pulse width should be determined by connecting an externa l capa citor (C
FOD
) between C
FOD
(pin 7) and COM (pin 2). (Exam ple : if C
FOD
= 33 nF , then tFO = ms
(typ.)) Please refer to the 2nd note 5 for calculation method.
6. Input signal is active-HIGH type. There is a 3.3 k
resistor inside the IC to pull down each input signal line to GND. When employing R C coup ling circ uits, set up such RC cou-
ple that input signal agree with turn-off / turn-on threshold voltage.
7. To prevent errors of the protection function, the wiring around R
F
and CSC should be as short as possible.
8. In the short-circuit protection circuit, please select the R
FCSC
time constant in the range 1.5 ~ 2 s.
9. Each capacitor should be mounted as close to the pins of the Motion SPM 3 product as possible.
10. To prevent surge destruction, the wiring between the smoothing capacitor and the P & GND pins should be as short as possible. The use of a high-frequency non-inductive
capacitor of around 0.1 ~ 0.22
F between the P & GND pins is recommended.
11. Relays are used in almost every systems of electrical equipment in home appliances. In these cases, there should be sufficient distance between the MCU and the relays.
12. C
SPC15
should be over 1 F and mounted as close to the pins of the Motion SPM 3 product as possible.
Fault
+15 V
C
BS
C
BSC
RBSD
BS
CBSC
BSC
RBSD
BS
C
BS
C
BSC
R
BS
D
BS
C
SP15
C
SPC15
C
FOD
+5 V
R
PF
C
BPF
R
S
M
Vdc
C
DCS
Gating UH
Gating VH
Gating WH
Gating WL
Gating VL
Gating UL
C
PF
M
C
U
R
FU
R
FV
R
FW
R
SU
R
SV
R
SW
C
FU
C
FV
C
FW
W-Phase Current
V-Phase Current
U-Phase Current
R
F
COM
VCC
IN(UL)
IN(VL)
IN(WL)
VFO
C(FOD)
C(SC)
OUT(UL)
OUT(VL)
OUT(WL)
NU(21)
N
V
(22)
N
W
(23)
U (24)
V (25)
W (26)
P (27)
(20) V
S(W)
(19) V
B(W)
(16) V
S(V)
(15) V
B(V)
(8) C
SC
(7) C
FOD
(6) V
FO
(5) IN
(WL)
(4) IN
(VL)
(3) IN
(UL)
(2) COM
(1) V
CC(L)
VCC
VB
OUT
COM
VS
IN
VB
VS
OUT
IN
COM
VCC
VCC
VB
OUT
COM
VS
IN
(18) V
CC(WH)
(17) IN
(WH)
(14) V
CC(VH)
(13) IN
(VH)
(12) V
S(U)
(11) V
B(U)
(10) V
CC(UH)
(9) IN
(UH)
Input Signal for Short-
Circuit Protection
C
SC
R
E(UH)
V
SL
R
E(VH)
R
E(WH)
Page 13
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 13 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Detailed Package Outline Drawings
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions,
specifically the the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MO/MOD27BA.pdf
Page 14
FSBB15CH60 Motion SPM® 3 Series
©2006 Fairchild Semiconductor Corporation 14 www.fairchildsemi.com
FSBB15CH60 Rev. C6
Page 15
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