The HGT1S20N60A4S9A is MOS gated high voltage switching
devices combining the best features of MOSFETs and bipolar
transistors. These devices have the high input impedance of
a MOSFET and the low on-state conduction loss of a bipolar
transistor. The much lower on-state voltage drop varies only
moderately between 25
o
C and 150oC.
This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power
supplies.
Formerly Developmental Type TA49339.
Ordering Information
PART NUMBER PACKAGE BRAND
HGT1S20N60A4S9A TO-263AB 20N60A4
NOTE: When ordering, use the entire part number.
Symbol
C
Features
• >100kHz Operation at 390V, 20A
• 200kHz Operation at 390V, 12A
• 600V Switching SOA Capability
• Typical Fall Time. . . . . . . . . . . . . . . . . 55ns at T
• Low Conduction Lo ss
• Temperature Compensating SABER™ Model
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• Related Literature
- TB334 “Guidelines for Solde ring Surface Mount
Components to PC Boards
Packaging
JEDEC TO-263AB
COLLECTOR
(FLANGE)
G
C
E
= 125oC
J
G
E
FAIRCHILD SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
CAUTION: Stresses above those listed in “A bsolute Maximu m Rating s” may cause per manent d amage to t he device. This is a str ess on ly rating and operation o f the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
PKG
70 A
40 A
280 A
±20 V
±30 V
290 W
-55 to 150
300
260
o
C
o
C
o
C
NOTE:
1. Pulse width limited by maximum junction temperature.
Electrical Specifications
TJ = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Collector to Emitter Breakdown Voltage BV
Emitter to Collector Breakdown Voltage BV
Collector to Emitter Leakage Current I
Collector to Emitter Saturation Voltage V
Gate to Emitter Threshold Voltage V
Gate to Emitter Leakage Current I
CES
ECS
CES
CE(SAT) IC
GE(TH) IC
GES
Switching SOA SSOA T
Gate to Emitter Plateau Voltage V
On-State Gate Charge Q
Current Turn-On Delay Time t
Current Rise Time t
Current Turn-Off Delay Time t
Current Fall Time t
Turn-On Energy (Note 3) E
Turn-On Energy (Note 3) E
Turn-Off Energy (Note 2) E
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Current Turn-On Delay Time t
d(ON)I
Current Rise Time t
Current Turn-Off Delay Time t
d(OFF)I
Current Fall Time t
Turn-On Energy (Note 3) E
Turn-On Energy (Note 3) E
Turn-Off Energy (Note 2) E
Thermal Resistance Junction To Case R
rI
fI
ON1
ON2
OFF
θJC
IGBT and Diode at TJ = 125oC
I
= 20A
CE
= 390V
V
CE
= 15V -105 135 ns
V
GE
R
= 3Ω
G
L = 500µH
Test Circuit (Figure 20)
NOTES:
2. Turn-Off Energy Loss (E
at the point where the collector current equals zero (I
of Power Device Turn-Off Switching Loss. T his test method produces the true total Turn-Off Energy Loss.
3. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E
is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same T
Figure 20.
Typical Performance Curves
100
80
) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
OFF
= 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
CE
ON1
J
Unless Otherwise Specified
DIE CAPABILITY
V
= 15V
GE
120
TJ = 150oC, RG = 3Ω, V
100
-15 21 ns
-13 18 ns
-55 73 ns
-115 -µJ
-510 600 µJ
-330 500 µJ
--0.43
is the turn-on loss of the IGBT only. E
o
C/W
ON2
as the IGBT. The diode type is specified in
= 15V, L = 100µH
GE
, DC COLLECTOR CURRENT (A)
I
60
40
20
CE
0
25
PACKAGE LIMIT
50
TC, CASE TEMPERATURE (oC)
75 100 125 150
, COLLECTOR TO EMITTER CURRENT (A)
I
CE
80
60
40
20
0
0
100 200 300 400 500 600
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
700
FIGURE 1. DC COLLECTOR CURRENT vs CASE FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
TEMPERATURE
500
300
f
= 0.05 / (t
MAX1
f
= (PD - PC) / (E
MAX2
= CONDUCTION DISSIPATION
P
C
(DUTY FACTOR = 50%)
= 0.43oC/W, SEE NOTES
R
ØJC
TJ = 125oC, RG = 3Ω, L = 500µH, V
5
I
, OPERATING FREQUENCY (kHz)
MAX
f
100
40
d(OFF)I
10 20
, COLLECTOR TO EMITTER CURRENT (A)
CE
ON2
+ t
d(ON)I
+ E
OFF
T
V
C
GE
o
75
C
15V
)
)
= 390V
CE
30 40
50
14
12
10
8
6
4
2
, SHORT CIRCUIT WITHSTAND TIME (µs)
0
SC
t
1011 12
VCE = 390V, RG = 3Ω, TJ = 125oC
V
GE
I
SC
t
SC
13 14
, GATE TO EMITTE R VOLTAGE (V)
15
450
400
350
300
250
200
150
100
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR T O FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discha rged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production b y nume rous equipme nt manuf acturers i n
military, industrial and consumer applicat ions, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled saf ely if the following basic precautions are
taken:
1. Prior to assembly into a circuit, all l eads s hould be k ept
shorted together either by the use of metal shorting
springs or by the inse rtion into co nductive material such
as “ECCOSORBD™ LD26” or equivalent.
2. When devices are removed b y hand from their carriers,
the hand being used should be grou nded b y any suitab le
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should ne v er b e ins erted into or r emo v e d from
circuits with power on.
5. Gate Volta ge Rating - Ne v er e xceed the gate- vol tage
rating of V
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gate s of these de vice s are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacito r due to leak age
currents or pickup.
7. Gate Protection - These devices do not ha ve an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
. Exceeding the rated VGE can result in
GEM
Operating Frequency Information
Operating freq uency information for a typical device
(Figure 3) is presented as a gui de for estimating device
performance for a specific application. Other typical
frequency vs collector current (I
the information shown for a typical unit in Figures 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows f
MAX1
or f
MAX2
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
f
MAX1
is defined by f
MAX1
= 0.05/(t
Deadtime (the deno minator) ha s been a rbitra rily held to 10%
of the on-state time for a 50% duty factor . Other definitions
are possible. t
d(OFF)I
and t
d(ON)I
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T
is defined by f
f
MAX2
allowable dissipation (P
= (PD - PC)/(E
MAX2
) is defined by PD = (TJM - TC)/R
D
The sum of device switching and conduction losses must not
exceed P
conduction losses (P
P
C
E
ON2
shown in Figure 21. E
. A 50% duty factor was used (Figure 3) and the
=(V
and E
D
CE xICE
OFF
) are approximate d by
C
)/2.
are defined in the switching waveforms
is the integral of the
ON2
instantaneous power loss (I
E
is the integral of the instantaneous power loss
OFF
(I
CE xVCE
calculation for E
(I
CE
) during turn-off. All tail losses are included in the
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE
SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,
SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or syst em s
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
PreliminaryFirst ProductionThis datasheet contains preliminary data, and
No Identification NeededFull ProductionThis datasheet contains final specifications. Fairchild
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
ObsoleteNot In ProductionThis datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I19
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