FQD2N80 / FQU2N80
800V N-Channel MOSFET
January 2008
QFET
®
General Description
FQD2N80 / FQU2N80
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
Features
• 1.8A, 800V, R
• Low gate charge ( typical 12 nC)
• Low Crss ( typical 5.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
DS(on)
= 6.3Ω @V
GS
D
!
!
G
S
D-PAK
FQD Series
G
Absolute Maximum Ratings
I-PAK
G
D
S
TC = 25°C unless otherwise noted
FQU Series
Symbol Parameter FQD2N80 / FQU2N80 Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt
P
D
Drain-Source Voltage 800 V
Drain Current
- Continuous (T
- Continuous (T
Drain Current - Pulsed
= 25°C)
C
= 100°C)
C
(Note 1)
1.8 A
1.14 A
7.2 A
Gate-Source Voltage ± 30 V
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Power Dissipation (TA = 25°C) *
Power Dissipation (T
= 25°C)
C
(Note 2)
(Note 1)
(Note 1)
(Note 3)
180 mJ
1.8 A
5.0 mJ
4.0 V/ns
2.5 W
50 W
- Derate above 25°C 0.4 W/°C
, T
T
J
STG
T
L
Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
300 °C
= 10 V
D
!
!
"
"
"
"
"
"
!
!
S
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJC
R
θJA
R
θJA
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor International Rev. A2, January 2009
Thermal Resistance, Junction-to-Case -- 2.5 °C/W
Thermal Resistance, Junction-to-Ambient * -- 50 °C/W
Thermal Resistance, Junction-to-Ambient -- 110 °C/W
FQD2N80 / FQU2N80
Electrical Characteristics
T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BV
DSS
/ ∆T
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
J
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
V
= 0 V, I
GS
= 250 µA, Referenced to 25°C
I
D
V
= 800 V, VGS = 0 V
DS
= 640 V, TC = 125°C
V
DS
V
= 30 V, VDS = 0 V
GS
V
= -30 V, VDS = 0 V
GS
= 250 µA
D
800 -- -- V
-- 0.9 -- V/°C
-- -- 10 µA
-- -- 100 µA
-- -- 100 nA
-- -- -100 nA
On Characteristics
V
R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
V
= VGS, I
DS
V
GS
V
DS
D
= 10 V, ID = 0.9 A
= 50 V, ID = 0.9 A
= 250 µA
(Note 4)
3.0 -- 5.0 V
-- 4.9 6.3 Ω
-- 2.4 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance -- 45 60 pF
Reverse Transfer Capacitance -- 5.5 7.0 pF
V
= 25 V, VGS = 0 V,
DS
f = 1.0 MHz
-- 425 550 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Turn-On Rise Time -- 30 70 ns
Turn-Off Delay Time -- 25 60 ns
Turn-Off Fall Time -- 28 65 ns
Total Gate Charge
Gate-Source Charge -- 2.6 -- nC
Gate-Drain Charge -- 6.0 -- nC
V
= 400 V, ID = 2.4 A,
DD
R
= 25 Ω
G
V
= 640 V, ID = 2.4 A,
DS
V
GS
= 10 V
(Note 4, 5)
(Note 4, 5)
-- 12 35 ns
-- 12 15 nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 105mH, IAS = 1.8A, VDD = 50V, R
3. I
SD
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2009 Fairchild Semiconductor International
Maximum Continuous Drain-Source Diode Forward Current -- -- 1.8 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 7.2 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge -- 2.0 -- µC
≤ 2.4A, di/dt ≤ 200A/µs, V
= 25 Ω, Starting T
G
≤ BV
DD
Starting TJ = 25°C
DSS,
= 25°C
J
V
= 0 V, IS = 1.8 A
GS
= 0 V, IS = 2.4 A,
V
GS
dI
/ dt = 100 A/µs
F
-- -- 1.4 V
-- 480 -- ns
(Note 4)
Rev. A2, January 2009
Typical Characteristics
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
0
6.5 V
10
6.0 V
Bottom : 5.5 V
-1
FQD2N80 / FQU2N80
10
, Drai n Current [A]
D
I
-2
10
-1
10
0
10
※
Notes :
1. 250μs Pulse Test
℃
2. T
= 25
C
1
10
VDS, Drain- Source Voltage [V]
0
10
, Drai n Current [A]
D
I
-1
10
246810
150oC
25oC
VGS, Gate-Source Voltage [V]
-55oC
※
Notes :
1. V
= 50V
DS
2. 250μs Pulse Test
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
℃
℃
25
※
Notes :
= 0V
1. V
GS
2. 250μs Pulse Test
VGS = 20V
VGS = 10V
※
Note : T
= 25
J
12
10
],
8
Ω
[
DS(ON)
6
R
4
Drain-Sour ce On-Resi stance
2
0123456
ID, Drain Cur rent [A]
0
10
150
, Reverse Drain Curr ent [ A]
DR
℃
I
-1
10
0.2 0.4 0.6 0.8 1. 0 1.2
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
VDS = 160V
VDS = 400V
VDS = 640V
※
Note : I
700
600
500
400
300
200
Capacitance [pF]
100
0
-1
10
C
= Cgs + Cgd (Cds = shorted)
iss
= Cds + C
C
oss
gd
C
= C
rss
C
iss
C
oss
C
rss
0
10
gd
10
※
1. V
2. f = 1 MHz
1
Notes :
= 0 V
GS
VDS, Drain- Source Voltage [V]
12
10
8
6
4
, Gate- Source Vol tage [ V]
2
GS
V
0
0 2 4 6 8 10 12 14
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
= 2.4A
D
Rev. A2, January 2009 ©2009 Fairchild Semiconductor International