FQD1N80 / FQU1N80
FQD1N80 / FQU1N80
800V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
D
S
D-PAK
FQD Series
G
D
S
G
Features
• 1.0A, 800V, R
• Low gate charge ( typical 5.5nC)
• Low Crss ( typical 2.7pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
I-PAK
FQU Series
DS(on)
= 20Ω @V
G
!
!
January 2009
QFET
= 10 V
GS
D
!
!
"
"
"
"
!
!
"
"
"
"
!
!
S
®
Absolute Maximum Ratings T
= 25°C unless otherwise noted
C
Symbol Parameter FQD1N80 / FQU1N80 Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt
P
D
Drain-Source Voltage 800 V
Drain Current
- Continuous (T
- Continuous (T
Drain Current - Pulsed
= 25°C)
C
= 100°C)
C
(Note 1)
1.0 A
0.63 A
4.0 A
Gate-Source Voltage ± 30 V
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Power Dissipation (TA = 25°C) *
Power Dissipation (T
= 25°C)
C
(Note 2)
(Note 1)
(Note 1)
(Note 3)
90 mJ
1.0 A
4.5 mJ
4.0 V/ns
2.5 W
45 W
- Derate above 25°C 0.36 W/°C
, T
T
J
STG
T
L
Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
300 °C
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJC
R
θJA
R
θJA
* When mounted on the minimum pad size recommended (PCB Mount)
Thermal Resistance, Junction-to-Case -- 2.78 °C/W
Thermal Resistance, Junction-to-Ambient * -- 50 °C/W
Thermal Resistance, Junction-to-Ambient -- 110 °C/W
©2009 Fairchild Semiconductor Corporation Rev. A3. October 2009
FQD1N80 / FQU1N80
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BV
DSS
/ ∆T
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
J
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
V
= 0 V, I
GS
= 250 µA, Referenced to 25°C
I
D
V
= 800 V, VGS = 0 V
DS
= 640 V, TC = 125°C
V
DS
V
= 30 V, VDS = 0 V
GS
V
= -30 V, VDS = 0 V
GS
= 250 µA
D
800 -- -- V
-- 1.0 -- V/°C
-- -- 10 µA
-- -- 100 µA
-- -- 100 nA
-- -- -100 nA
On Characteristics
V
R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
V
= VGS, I
DS
V
GS
V
DS
D
= 10 V, ID = 0.5 A
= 50 V, ID = 0.5 A
= 250 µA
3.0 -- 5.0 V
-- 15.5 20 Ω
-- 0.75 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance -- 20 26 pF
Reverse Transfer Capacitance -- 2.7 3.5 pF
V
= 25 V, VGS = 0 V,
DS
f = 1.0 MHz
-- 150 195 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Turn-On Rise Time -- 25 60 ns
Turn-Off Delay Time -- 15 40 ns
Turn-Off Fall Time -- 25 60 ns
Total Gate Charge
Gate-Source Charge -- 1.1 -- nC
Gate-Drain Charge -- 3.3 -- nC
V
= 400 V, ID = 1.0 A,
DD
R
= 25 Ω
G
V
= 640 V, ID = 1.0 A,
DS
V
GS
= 10 V
-- 10 30 ns
-- 5.5 7.2 nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 170mH, IAS = 1.0A, VDD = 50V, R
3. I
SD
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
Maximum Continuous Drain-Source Diode Forward Current -- -- 1.0 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 4.0 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge -- 0.6 -- µC
≤ 1.0A, di/dt ≤ 200A/µs, V
= 25 Ω, Starting T
G
≤ BV
DD
Starting TJ = 25°C
DSS,
= 25°C
J
V
= 0 V, IS = 1.0 A
GS
= 0 V, IS = 1.0 A,
V
GS
dI
/ dt = 100 A/µs
F
-- -- 1.4 V
-- 300 -- ns
Rev. A3. January 2009©2009 Fairchild Semiconductor Corporation
FQD1N80 / FQU1N80
Typical Characteristics
V
GS
Top : 15.0 V
10.0 V
0
8.0 V
10
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
-1
10
, Drai n Current [A]
D
I
-2
10
-1
10
0
10
VDS, Drain- Source Voltage [V]
50
40
],
30
$
[
DS(ON)
R
20
Drain-Sour ce On-Resi stance
10
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1. 6 1. 8 2.0
VGS = 10V
VGS = 20V
ID, Drain Cur rent [A]
!
Notes :
1. 250"s Pulse Test
#
2. T
= 25
C
1
10
!
Note : T
= 25
J
0
10
25oC
150oC
-55oC
!
Notes :
1. V
= 50V
DS
2. 250"s Pulse Test
, Drai n Current [A]
D
I
-1
10
246810
VGS, Gate-Source Voltage [V]
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
0
10
#
, Reverse Drain Curr ent [ A]
DR
#
I
-1
10
0.2 0.4 0.6 0.8 1. 0 1.2
150
#
25
!
Notes :
1. V
= 0V
GS
2. 250"s Pulse Test
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
VDS = 160V
VDS = 400V
!
Note : I
= 1.0 A
D
250
200
150
100
Capacitan ce [pF]
50
0
-1
10
C
= Cgs + Cgd (Cds = shorted)
iss
C
= Cds + C
oss
gd
C
= C
rss
gd
C
iss
C
oss
C
rss
0
10
10
!
1. V
2. f = 1 MHz
1
Notes :
GS
= 0 V
VDS, Drain- Source Voltage [V]
12
10
8
6
4
, Gate- Source Vol tage [ V]
2
GS
V
0
0123456
VDS = 640V
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
©2009 Fairchild Semiconductor Corporation Rev. A3. January 2009