Fairchild FQPF9N08 service manual

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80V N-Channel MOSFET
December 2000
QFET
QFET
QFETQFET
FQPF9N08
TM
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes These devices are well suited for low voltage applications such as automotive, high efficiency switching for DC/DC converters, and DC mo tor control.
D
G
S
Absolute Maximum Ratings T
Symbol Parameter FQPF9N08 Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt P
D
T
, T
J
STG
T
L
Drain-Source Voltage 80 V Drain Current
Drain Current - Pulsed Gate-Source Voltage ± 25 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Power Dissipation (TC = 25°C)
Operating and Storage Temperature Range -55 to +175 °C Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds
- Continuous (T
- Continuous (T
- Derate above 25°C 0.15 W/°C
TO-220F
FQPF Series
= 25°C unless otherwise noted
C
= 25°C)
C
= 100°C)
C
Features
• 7.0A, 80V, R
• Low gate charge ( typical 5.9 nC)
• Low Crss ( typical 13 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
G
(Note 1)
(Note 2) (Note 1) (Note 1) (Note 3)
= 0.21Ω @VGS = 10 V
DS(on)
D
!
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"
"
"
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S
7.0 A
4.95 A 28 A
55 mJ
7.0 A
2.3 mJ
6.5 V/ns 23 W
300 °C
Thermal Characteristics
Symbol Parameter Typ Max Units
R
θJC
R
θJA
©2000 Fairchild Semiconductor International
Thermal Resistance, Junction-to-Case -- 6.52 °C/W Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W
Rev. A2, December 2000
FQPF9N08
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV BV / ∆T I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
DSS
Breakdown Voltage Temperature
DSS
Coefficient
J
Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
V
= 80 V, VGS = 0 V
DS
V
= 64 V, TC = 150°C
DS
V
= 25 V, VDS = 0 V
GS
= -25 V, VDS = 0 V
V
GS
80 -- -- V
-- 0.08 -- V/°C
-- -- 1 µA
-- -- 10 µA
-- -- 100 nA
-- -- -100 nA
On Characteristics
V R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage Static Drain-Source
On-Resistance Forward Transconductance
V
= VGS, ID = 250 µA
DS
= 10 V, ID = 3.5 A
V
GS
= 30 V, ID = 3.5 A
V
DS
(Note 4)
2.0 -- 4.0 V
-- 0.16 0.21
-- 3.45 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance -- 70 90 pF Reverse Transfer Capacitance -- 13 17 pF
= 25 V, VGS = 0 V,
V
DS
f = 1.0 MHz
-- 190 250 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q
g gs gd
Turn-On Delay Time Turn-On Rise Time -- 28 65 ns Turn-Off Delay Time -- 9 28 ns Turn-Off Fall Time -- 17 45 n s Total Gate Charge Gate-Source Charge -- 1.5 -- nC Gate-Drain Charge -- 2.6 -- nC
= 40 V, ID = 9.3 A,
V
DD
= 25
R
G
V
= 64 V, ID = 9.3 A,
DS
V
GS
= 10 V
(Note 4, 5)
(Note 4, 5)
-- 2.8 15 ns
-- 5.9 7.7 nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.54mH, IAS = 7.0A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 9.3A, di/dt 300A/µs, VDD BV
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Maximum Continuous Drain-Source Diode Forward Current -- -- 7.0 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 28 A
= 0 V, IS = 7.0 A
Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 70 -- nC
Starting TJ = 25°C
DSS,
V
GS
= 0 V, IS = 9.3 A,
V
GS
/ dt = 100 A/µs
dI
F
-- -- 1.5 V
-- 50 -- ns
(Note 4)
Rev. A2, December 2000
Typical Characteristics
FQPF9N08
V
GS
Top : 15.0 V
10.0 V
8.0 V
1
7.0 V
10
6.0 V
5.5 V
5.0 V Bottom : 4.5 V
0
, Drain Current [A]
10
D
I
-1
10
0
10
Notes :
1. 250μs Pulse Test
2. T
VDS, Drain-Source Voltage [V]
1.0
0.8
],
0.6
[
DS(on)
R
0.4
Drain-Source On-Resistance
0.2
0.0 0 4 8 12 16 20 24
VGS = 10V
VGS = 20V
ID , Drain Current [A]
= 25
C
10
Note : T
1
10
1
0
10
25
, Drain Current [A]
D
I
-1
10
246810
-55
Note s :
1. V
= 30V
DS
2. 250μs Pulse Test
175
VGS , Gate -Source Voltage [V]
Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s
1
10
= 25
J
0
10
, Rever s e Drain Curre n t [A]
DR
I
10
175
-1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
25
Notes :
1. V
= 0V
GS
2. 250μs Pulse Test
VSD , So u rce-Dra in Volta g e [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
VDS = 40V
VDS = 64V
Note : I
500
400
300
200
C
= Cgs + Cgd (Cds = shorted)
iss
= Cds + C
C
oss
gd
C
= C
rss
gd
Notes :
= 0 V
1. V
GS
C
iss
C
oss
2. f = 1 MH z
Capacitance [pF]
100
0
-1
10
0
10
C
rss
1
10
VDS, Drain-Source Voltage [V]
12
10
8
6
4
, Gate-Source Voltage [V]
2
GS
V
0
01234567
QG, Tota l Gate Charge [n C]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Ch a ra ct eristics
= 9.3A
D
Rev. A2, December 2000©2000 Fairchild Semiconductor International
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